Chen, F.F.ChenWang, Y.Y.WangHsiao, Y.-H.Y.-H.HsiaoLin, J.-L.J.-L.LinChen, Y.-C.Y.-C.ChenHUEI WANG2020-06-042020-06-042017https://scholars.lib.ntu.edu.tw/handle/123456789/497562A 4.6-GHz Class-F-1 CMOS power amplifier implemented in 0.18-μm CMOS process for wireless applications with high output power and high efficiency is proposed. By using harmonics tuning technique and cascode devices, the proposed power amplifier achieves an output power of 27.8-dBm with power-add-efficiency (PAE) of 32% and quiescent 158-mW dc power consumption. © 2017 IEEE.4.6 GHz; Class-F-1; CMOS PA[SDGs]SDG7Cascode amplifiers; CMOS integrated circuits; Efficiency; Energy efficiency; Radio waves; Wireless telecommunication systems; 4.6 GHz; Class-f; CMOS PA; CMOS power amplifiers; DC power consumption; High output power; High-efficiency; Wireless application; Power amplifiersconference paper10.1109/RFIT.2017.80482662-s2.0-85032839872https://www.scopus.com/inward/record.uri?eid=2-s2.0-85032839872&doi=10.1109%2fRFIT.2017.8048266&partnerID=40&md5=084508d1170c19f5dee8302f8af79cef