VLSI architecture for discrete wavelet transform based on B-spline factorization

Dept. of Electr. Eng., National Taiwan Univ.Huang, Chao-TsungChao-TsungHuangTseng, Po-ChihPo-ChihTsengChen, Liang-GeeLiang-GeeChen2007-04-192018-07-062007-04-192018-07-062003-08N/Ahttp://ntur.lib.ntu.edu.tw//handle/246246/2007041910042909application/pdf328397 bytesapplication/pdfen-USVLSI architecture for discrete wavelet transform based on B-spline factorizationjournal articlehttp://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910042909/1/01235694.pdf