A novel low-voltage content-addressable-memory (CAM) cell with a fast tag-compare capability using partially depleted (PD) SOI CMOS dynamic-threshold (DTMOS) techniques

S. C. LiuFrank WuJAMES-B KUO2018-09-102018-09-102001-04https://www.scopus.com/inward/record.uri?eid=2-s2.0-0035307445&doi=10.1109%2f4.913752&partnerID=40&md5=01dc381852607d860e630d4215369434This paper reports a novel low-voltage content-addressable-memory (CAM) cell with a fast tag-compare capability using partially depleted (PD) SOI CMOS dynamic-threshold (DTMOS) techniques. With two auxiliary pass transistors to dynamically control the bodies of transistors in the tag-compare portion of CAM cell, this SOI CAM cell has a fast tag-compare capability at a low supply voltage of 0.7 V as verified by the results from the two-dimensional semiconductor device simulation program MEDICI.CMOS; Content-addressable memory (CAM); Dynamic threshold (DTMOS); Low voltage; Partially depleted (PD) silicon-on-insulator (SOI); Tag cell; VLSIA novel low-voltage content-addressable-memory (CAM) cell with a fast tag-compare capability using partially depleted (PD) SOI CMOS dynamic-threshold (DTMOS) techniquesjournal article10.1109/4.9137522-s2.0-0035307445WOS:000167873300018