Design of a high-speed bloc k interleaving/deinterleaving architecture for wireless communication applications

Yu, C.C.YuYen, M.-H.M.-H.YenHsiung, P.-A.P.-A.HsiungSAO-JIE CHEN2018-09-102018-09-102009http://www.scopus.com/inward/record.url?eid=2-s2.0-70349286437&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/350236Design of a high-speed bloc k interleaving/deinterleaving architecture for wireless communication applicationsconference paper10.1109/ICCE.2009.5012220