Analysis and VLSI architecture of update step in motion-compensated temporal filtering

Dept. of Electr. Eng., National Taiwan Univ.Cheng, Chih-ChiChih-ChiChengChen, Ching-YehChing-YehChenChen, Yi-HauYi-HauChenLIANG-GEE CHEN2007-04-192018-07-062007-04-192018-07-062006-05http://ntur.lib.ntu.edu.tw//handle/246246/200704191001133application/pdf5071715 bytesapplication/pdfen-USAnalysis and VLSI architecture of update step in motion-compensated temporal filteringjournal article10.1109/ISCAS.2006.1693840http://ntur.lib.ntu.edu.tw/bitstream/246246/200704191001133/1/01693840.pdf