Wang ZWang XJAMES-B KUO2021-09-022021-09-02201800189383https://www.scopus.com/inward/record.uri?eid=2-s2.0-85054386112&doi=10.1109%2fTED.2018.2870174&partnerID=40&md5=e9b4701b6d6174df81f85c539554dc27https://scholars.lib.ntu.edu.tw/handle/123456789/580948An analytical model for the power vertical MOS device with a high-k insulating dielectric (HKMOS) is derived via the superposition methodology on the condition of punchthrough. Considering three portions-the superjunction part, the p-i-n diode, and the interface charges at the heterointerface based on the conservation of electric displacement, the HKMOS device could be modeled well as verified by the 2-D simulation results. ? 2018 IEEE.Analytical models; Dielectric materials; Electric breakdown; Electric insulators; Electric potential; MOS devices; Permittivity; Semiconductor junctions; Electric displacement; Hetero interfaces; High dielectrics; Interface charge; Modeling power; PiN diode; Specific-on resistance; Superjunctions; High-k dielectricjournal article10.1109/TED.2018.28701742-s2.0-85054386112