Novel 0.8V True-Single-Phase-Clocking (TSPC) Latches Using PD-SOI DTMOS Techniques for Low-Voltage CMOS VLSI Circuits

J. B. KuoT. Y. ChiangJAMES-B KUO2018-09-102018-09-102001-10http://scholars.lib.ntu.edu.tw/handle/123456789/294329Novel 0.8V True-Single-Phase-Clocking (TSPC) Latches Using PD-SOI DTMOS Techniques for Low-Voltage CMOS VLSI Circuitsconference paper10.1109/soic.2001.957986