呂學士Lu, Shey-Shi臺灣大學:電機工程學研究所王沛宜Wang, Pei-YePei-YeWang2010-07-012018-07-062010-07-012018-07-062009U0001-1708200917012600http://ntur.lib.ntu.edu.tw//handle/246246/188055近年來，隨著製程的縮小，使得系統單晶片的概念能夠實行，並且大量的應用在生醫方面。隨著科技的發展，藉著生醫晶片，人類的健康控制能夠更詳細，更完整且是及時且有效率的。在生醫應用中，由於生醫訊號通常都非常的微小且緩慢，所以我們需要一個前端的放大電路，先將這些微小的訊號放大到適合的大小來做後續的處理。在生醫應用中通常都需要非常低的功率消耗，故我們使用的是低功率，解析度中等及速度比較慢的漸近式類比數位轉換器在此應用當中。 在本論文的第一部份，一個低功率消耗十位元的漸近式類比數位轉換器將被實現，此類比數位轉換器利用門閘式時脈、功率開關及直接供應電壓為參考電壓之技巧，量測結果顯示此晶片操作於十萬赫茲轉換速度，其最高有效位元超過8.7位元。微分型線性誤差介於+0.6118/-1最小單位位元，積分型非線性誤差介於+1.4431/-1.4425最小單位位元，晶片面積為1.13mmx1.07mm，以TSMC 0.35um CMOS 2P4M製程製作。 另一方面，一個用於生醫應用之回授型自動增益控制儀表放大器及十位元漸近式類比數位轉換器將被實現。在此電路中，當需要自動增益控制時，漸近式類比數位轉換器的數位控制訊號會回授控制可程序控制的儀表放大器來得到不同的增益。此可程序控制儀表放大器有八種不同的增益，其開迴路增益為125dB，向位邊界為76度。此電路以TSMC 0.35um CMOS 2P4M製程製作，其供應電源為3V，功率消耗為504uW，晶片面積為1.25mmx1.36mm。In recent years, with the scaling down of process, the concept of system on chip (SoC) can be realized. With the development if technology, people can control their health more detailed and complete, instantaneously and effectively. Due to the features of biomedical signals, which are usually ultra-low slevels, low speed and large noise. Therefore, we need an instrumentation amplifier to amplify the signal to proper scale for the following application. Since the requirement of biomedical application needs low power consumption, a successive approximation analog to digital converter is adopted in our implementation, which has the features of low speed, low power consumption and moderate accuracy. In the first part of this thesis, a 10-bit, low power, successive approximation is implemented. By using some techniques such as gating-clock, power switch and directly using supply voltage as reference voltage. The measurement results shows that while operating at 100KSPS, the maximum effective number of bits (ENOB) is higher than 8.7 bits. The measurements differential non-linearity (DNL) is between +0.6118/-1 LSB and the integral non-linearity (INL) is between +1.4431/-1.4425 LSB. The die area is 1.13mmx1.07mm fabricated in TSMC 0.35um CMOS 2P4M process. On the other hand, a feedback type automatic gain control instrumentation amplifier with a 10-bit successive approximation analog to digital converter is realized. In this implementation, while automatic gain control is on, the digital control unit of SAR ADC will produce feedback controlling signals to adjust the gain of programmable instrumentation amplifier (PGIA). This PGIA has eight kinds of gain, its open loop gain is 125db and phase margin is 76 degree. The die area is 1.25mmx1.36mm, which is implemented in TSMC 0.35um CMOS process with 3V supply voltage and the power consumption is 504uW.口試委員審定書 i謝 iibstract iiiontents viist of Figures vist of Tables viist of Figures 9ist of Tables 12hapter 1 1ntroduction 1.1 Motivation 1.2 Thesis Organization 3hapter 2 5undamentals of Analog Front-End 5.1 Introduction 5.2 Low Noise and Low Offset Circuits Technique 7.2.1 Introduction 7.2.2 Autozero Technique 7.2.3 Chopper Technique 8.2.3.1 Basic Principle 8.2.3.2 Residual Offset 10.2.3.3 Chopping Frequency Selection 12.3 Instrumentation Amplifier (IA) 13.3.1 Traditional Instrumentation Amplifier 13.3.2 Differential Difference Amplifier 14.4 Circuit implementation 16.4.1 Introduction 16.4.2 Chopper Technique 17.4.2.1 Chopper Modulator 17.4.2.2 Clock Generator 18.4.3 Differential Difference Amplifier 19.4.3.1 Rail-to-rail Differential Difference Input Stage 19.4.3.2 Constant Transconuctance (gm) Circuit 23.4.3.3 Transimpedence Amplifier with Class-AB Output Stage 24.5 Simulation Results 28hapter 3 32undamentals of Analog to Digital Converters 32.1 Introduction 32.2 ADC Performance Metrics 34.2.1 Static Specifications 35.2.2 Dynamic Specifications 39.3 Analog-to-Digital Converter Architecture 44.3.1 Flash Architecture 45.3.2 Two-Step Architecture 46.3.3 Successive Approximation Architecture 48.3.4 Pipelined Architecture 50.3.5 Delta-Sigma Architecture 52.4 Summary of ADC Architecture 54hapter 4 55 10-bit, Low Power Successive Approximation ADC 55.1 Introduction 55.2 SAR ADC Circuit Design 56.2.1 Motivation 56.2.1 Charge Redistribution SAR ADC 56.2.2 Binary Search Algorithm 59.3 Circuit Implementation 60.4 SAR ADC Whole Chip Simulation 76.4.1 ADC Simulation Techniques 76.4.2 Functional Simulation 77.4.3 Static Performance Simulation 77.4.4 Dynamic Performance Simulation 79.5 SAR ADC Measurement Results 81.5.1 Printed Circuit Board Design 82.5.2 Test Environment Setup 85.5.3 Functional Performance Measurement 86.5.4 Static Rerformance Measurement 87.5.5 Dynamic Performance Measurement 89.5.6 Measurement Result Summary 91hapter 5 92 Feedback Type Auto Gain Controlled Instrumentation Amplifier with A 10-bit Successive Approximation Analog to Digital Converter for Bio-medical Application 92.1 Introduction 92.2 Proposed Architecture of Analog Front-End 94.3 Circuit Implementation 95.3.1 Programmable Gain Instrumentation Amplifier 96.3.2 Rail-to-rail Differential Difference Amplifier (RRDDA) 98.3.3 A Ffeedback Type 10-bit SAR ADC 100.4 Simulation Results 104.5 Measurement Environment 110.5.1 Printed Circuit Board Ddesign 110.5.2 Test Environment Setup 112.6 Measurement Results 113.7 Measurement Result Summary 117hapter 6 118onclusion 118eferences 1193734422 bytesapplication/pdfen-US連續逼近式類比數位轉換器可程序控制儀表放大器自動增益控制放大器CMOSSAR ADCPGIAAGCthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/188055/1/ntu-98-J96921012-1.pdf