李建模Li, Chien-Mo臺灣大學:電子工程學研究所趙上鋒Chao, Shang-FengShang-FengChao2010-07-142018-07-102010-07-142018-07-102008U0001-2507200817133400http://ntur.lib.ntu.edu.tw//handle/246246/189075本論文提出一個電路診斷技術，可以使用多擷取時脈的高速掃描測試圖樣，定位電路中的轉換錯誤。為了快速的找出錯誤可能發生的地方，本論文提出了兩層的搜尋方法。首先，電路將被分成許多的無扇出區域，許多的無扇出區域再被分組成許多的無扇出區域群。此技術使用“X”作為錯誤影響的模型，所以錯誤的大小不會影響診斷的結果。使用Intel 64位元2.0GHz的CPU的機器，對ISCAS’89基準電路所做的實驗顯示，平均而言，使用六個擷取時脈的測試圖樣，所有的轉換電路可以在21秒內被準確的診斷出來。本論文所提出的技術非常適合使用在診斷短延遲錯誤，這是使用單一擷取時脈的慢速掃描測試圖樣所無法診斷出的。This thesis presents a diagnosis technique to locate transition faults using scan patterns with multiple capture clocks which are applied at speed. To quickly locate the candidate faults, a two-level search is proposed. The circuit is first partitioned into fanout-free regions (FFR’s), which are then partitioned into FFR groups. This technique uses the unknown “X” to model the fault effect so the fault size does not affect the diagnosis results. Experiments on ISCAS’89 large benchmark circuits with Intel 64-bit 2.0 GHz CPU show that, on the average, all transition faults are accurately diagnosed in 21 seconds using test patterns of six capture clocks. The proposed technique is suitable for small delay defects that cannot be diagnosed using slow speed scan test patterns with a single capture clock.摘要 ibstract iiable of Contents iiiist of Figures vist of Tables viihapter 1 Introduction 1.1 Motivation 1.2 Proposed Technique and Contribution 3.3 Organization 4hapter 2 Background 5.1 Sequential Fault Simulation 5.1.1 Differential Fault Simulation 6.1.2 Proofs 7.1.3 Hope 10.2 Sequential Diagnosis 16.3 X Fault Model 16hapter 3 Proposed Diagnosis Technique 19.1 Overall Diagnosis Flow 19.2 Preprocessor 20.3 Group Mode FFR Finder 23.4 Single Mode FFR Finder 29.5 Fault Simulator 34.6 Complexity Analysis 38hapter 4 Experimental Results 39.1 Diagnosis Results of Each Phase 42.2 Different Sequential Depths 46.3 Random Fault Sizes 47.4 Slow-to-rise/fall faults 48hapter 5 Discussion 49.1 Design Error Debugging 49.2 Other fault models 49.3 Comparison with Critical Path Tracing 50.4 Diagnosis with Functional Pattern 52.5 Backward Implication 53hapter 6 Summary 54eference 551315032 bytesapplication/pdfen-US轉換錯誤診斷多擷取時脈無扇出區域transition faultdiagnosisat-speedmultiple capture clocksfanout-free regionthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/189075/1/ntu-97-R95943084-1.pdf