劉深淵臺灣大學：電子工程學研究所吳家欣Wu, Chia-HsinChia-HsinWu2007-11-272018-07-102007-11-272018-07-102004http://ntur.lib.ntu.edu.tw//handle/246246/57334本論文主要涵豪潃茈D題。第一個主題主要是有關於一些高速前端電路中常用的原理及單晶片電感(monolithic inductor)在CMOS製程上的研究。 第二個主題在於將單晶片電感的研究應用在高速前端電路上，如高速寬頻前端放大器設計和具有正交訊號輸出的壓控震盪器。最後，則為此論文的結論。 在一開始的引言中，介紹一些關於單晶片電感的基本重要理論及一些高速前端電路如：寬頻放大器及壓控震盪器的運作原理及其應用。之後我們提出分佈式電容模型(Distributed capacitance model, DCM)來分析單晶片電感中的雜散電容。基於所提出之分佈式電容模型，一個簡單且準確的電感模型被提出來。實驗結果證明這個電感模型可以準確預估電感的特性及表現，這簡單的方法不僅提供一個寬頻且準確的電感模型且可以節省電感設計的時間。 從原始傳輸線理論出發，我們解釋為何電感中的電壓剖面圖(Voltage profile)為線性的，並可以用來計算電感的雜散電容值並推廣至差動式對稱電感上，並經由實驗結果來驗證。此外，我們提出選取金屬並聯技巧(Selective metal parallel shunting, SMPS)來使電感的品質因素極大值落在電路的工作頻率上，來改善電路的特性。三個2.3-2.4GHz壓控震盪器，分別使用全平面電感、並聯選取電感及全金屬並聯電感，已被實現來驗證所提出的理論。實驗結果顯示使用並聯選取電感的壓控震盪器其相位雜訊可以改善9.3dB及6dB，分別和使用全平面電感及全金屬並聯電感的壓控震盪器比較。而這選取金屬並聯技巧也可以應用在其他射頻電路或是高速前端電路上。 從電感的設計我們延伸至高速前端電路設計中。我們提出了一個頻寬延伸的技巧稱之為：多重電感串聯尖起技巧(Multiple inductive-series peaking technique)。兩個寬頻放大器已被實現來證明所提出之頻寬延伸理論，分別是10Gb/s轉阻放大器(TIA)及具帶通頻率響應的可調增益放大器(VGA)。利用所提出的技巧，這裡所展示的轉阻放大器達到61dBΩ的轉阻增益及7.2GHz的頻寬表現。而具帶通頻率響應的可調增益放大器可以達到20dB的增益調整範圍從16dB到-4dB，並達到132%的分數頻寬(Fractional bandwidth)。實驗結果顯示我們所提出的頻寬延伸技巧的確可以有效地加大電路頻寬，也極適用於CMOS製程上。 此外，一個新式的具正交訊號輸出的壓控震盪器(Quadrature voltage controlled oscillator, QVCO)也被提出。利用雜散垂直式雙載子元件(Parasitic Vertical BJT)及RC相位偏移裝置，這裡所提出之QVCO可以達到只有0.2∘相位誤差及-103dBc/Hz的相位雜訊在100KHz的偏移頻率。這裡所提出之QVCO非常適用於2.4GHz的無線系統應用。最後，我們總結這篇博士論文。As an introduction, some important fundamentals associated with on-chip inductors and front-end circuits have been introduced at first. In this dissertation, we proposed distributed capacitance model (DCM) to analyze parasitic capacitances in an on-chip inductor. Based on DCM, a simple and accurate approach to predict the behaviors of on-chip inductors is proposed. Experimental results show that the calculations of Cp and Csub without DCM much overestimate. The compact inductor model, which is built in accordance to the DCM, can be valid before the resonant frequency. The simple methodology not only provides a wide-band accurate inductor model but also saves inductor design time. Enlighten from the propagation property of signal in an inductor, the methodology to calculate parasitic capacitance in differential symmetric inductors has been proposed, which has verified with differently-sized symmetric inductors. Moreover, a SMPS method has been proposed to move fQmax onto the desired frequency without additional processing steps. Utilizing the proposed SMPS technique, inductor’s fQmax can be moved onto circuit operating frequency to ameliorate circuit performance. Three 2.3-2.4GHz VCOs using planar, AMPS, and SMPS inductors, respectively, have also been implemented. The phase noise of the VCO using SMPS inductors can be improved by 9.3dB and 6dB at 100kHz offset frequency, compared to the VCOs using planar and AMPS inductors, respectively. The proposed SMPS technique can not only be applicable to VCO but also other RF circuitries. Hereafter, we extend inductor design into our circuit applications. A bandwidth-extension technique called multiple inductive-series peaking technique. Two wide-band amplifiers: a 10Gb/s CMOS transimpedance amplifier and a CMOS bandpass VGA for an impulse-radio system have been reported to demonstrate the proposed technique. Employing multiple inductive-series peaking technique, the CMOS TIA reported here achieves gain of 61dBΩ with bandwidth of 7.2GHz. The CMOS VGA reported here can achieve 16dB peak power gain and the fractional bandwidth is 132% with tuning range of 20dB from 16dB to -4dB. The measured results demonstrate that the proposed technique of bandwidth extension can improve bandwidth performance significantly. The proposed technique of bandwidth extension is suitable for CMOS devices to achieve wideband and low-power characteristics simultaneously. The other application, a novel QVCO with low phase-noise and low phase-error performances, has been presented. Employing parasitic vertical BJT and RC phase shifters, this work exhibits only 0.2∘phase error and phase noise of -103dBc/Hz at 100KHz offset frequency, which indicates FOM of 183. The tuning range is 380MHz with center frequency of 2.45GHz. The proposed QVCO is very suitable to direct-conversion transceivers for 2.4GHz wireless applications. And finally, we summarize this dissertation.1 Introduction of Monolithic Inductors in CMOS technology 1 1.1 MOTIVATION………………………………………..…………… 1 1.2 INTRODUCTION OF ON-CHIP INDUCTORS………………….. 2 1.2.1 Inductor Categories…………………………….…………. 3 1.2.2 Inductors in CMOS High-Speed Front-end ICs.………….. 6 1.2.3 Inductor Losses in CMOS Process……………….……….. 10 1.2.4 Magnetically Coupled Loss……………….………………. 14 1.2.5 Definition of Inductor Quality Factor……………….……. 16 1.2.6 Device Characterization……………….………………….. 17 1.3 RESEARCH GOALS……………………………………………… 22 1.4 DISSERTATION OUTLINE……………….……………………… 22 2 Analysis of On-Chip Inductors Using the Distributed Capacitance Model 25 2.1 INTRODUCTION………………………………………………… 25 2.2 CHARACTERISTICS OF ON-CHIP SPIRAL INDUCTOR…..…. 27 2.3 THE COMPACT INDUCTOR MODEL………………………….. 28 2.3.1 Equivalent Capacitance Formula……….…..…………….. 29 2.3.2 Series Resistance Formulas…………………..………..….. 37 2.4 MODEL VALIDIATION………….…………………………..…… 37 2.4.1 Equivalent Capacitance Formula Validation……….…….. 38 2.4.2 S-parameters Validation……………….……..………..….. 39 2.4.3 Q-Factor Computation and Comparison……………....….. 42 2.4.4 Results Summary……………....…………………………... 45 2.5 SUMMARY…………………………..…………………………… 45 3 Selective Metal Parallel Shunting Inductor and Its VCO Application….. 47 3.1 INTRODUCTION………………………………………………… 47 3.2 ANALYSIS OF LINEAR VOLTAGE PROFILE IN AN ON-CHIP INDUCTOR AND EXTENDTION TO A SYMMETRIC INDUCTOR………….……………………………………………. 49 3.2.1 Basic Propagation Behavioral in an On-Chip Inductor….. 49 3.2.2 Voltage Profile of a Symmetric Inductor………………….. 51 3.3 SELECTIVE METAL PARALLEL SHUNTING TECHNIQUE TO MOVE fQmax ONTO THE DESIRED FREQUENCY…………. 54 3.4 COMPARISON BETWEEN CALCULATION AND MEASUREMENT…….…………………………………………… 60 3.5 CIRCUIT APPLICATION….……………………………………... 65 3.6 SUMMARY…………………………..…………………………… 68 4 CMOS Wide-Band Amplifiers Using Multiple Inductive-Series Peaking Technique 71 4.1 INTRODUCTION……………..……………………………...…… 71 4.2 INDTRODUCTIONS OF OPTICAL TIAs AND VGAs FOR AN IMPULSE-RADIO SYSTEM……………………….……….……. 73 4.2.1 Transimpedance Amplifiers for Optical Interconnects..…... 73 4.2.2 Variable-gain Amplifiers for Impulse-radio System..…....... 74 4.3 PROPOSED BANDWIDTH EXTENSION TECHNIQUE……..… 75 4.4 DESIGNS AND EXPERIMENTAL RESULTS OF PROPOSED 10Gb/s CMOS TRANSIMPEDANCE AMPLIFIER……..……….. 78 4.4.1 Designs of the proposed 10Gb/s TIA……..……………….. 78 4.4.2 Experimental Results of the proposed 10Gb/s TIA ………. 80 4.5 DESIGNS AND EXPERIMENTAL RESULTS OF PROPOSED CMOS VARIABLE-GAIN AMPLIFIER……..…………………… 84 4.5.1 Designs of the proposed VGA for an Impulse-radio System. 84 4.5.2 Experimental Results of the proposed VGA for an Impulse-radio System…..………………………………….. 87 4.6 SUMMARY…………………………..…………………………… 91 5 A 2.4GHz Low-power Low-phase-error Quadrature VCO 93 5.1 INTRODUCTION……………..……………………………...…… 93 5.2 DESIGN CONSTRAINTS OF A QUADRATURE VCO…...…….. 95 5.2.1 Traditional Quadrature VCO…………………………….... 97 5.2.2 Analysis and Design of a 1.8GHz CMOS LC Quadrature VCO..………………………………………………………. 97 5.2.3 A Low-Phase-Noise 5GHz CMOS Quadrature VCO Using Superharmonic Coupling………………………………….. 98 5.2.4 A 10GHz CMOS Quadrature LC-VCO for Multirate Optical Applications………………………………………. 99 5.2.5 Analysis and Design of an Optimally Coupled 5GHz Quadrature LC Oscillator…………………………………. 100 5.2.6 A 1.57GHz Fully Integrated Very Low-Phase-Noise Quadrature VCO…………………………………………... 101 5.3 PROPOSED 2.4GHz QUADRATURE VCO USING PARASITIC VERTICAL BJT AND PHASE SHIFTER………...………………. 102 5.4 EXPERIMENTAL RESULTS…………………………………..…. 107 5.5 SUMMARY…………………………..…………………………… 113 5.6 REFERENCES IN FIGURE 5.23…………………………………. 115 5.7 REFERENCES IN FIGURE 5.24…………………………………. 116 6 Conclusion and Future Work 119 Appendix A References……………………………………………………... 121 Appendix B Publication List………………………………………………... 129 Appendix C Vita and Honor List…………………………………………… 133en-US寬頻放大器電感射頻電路Wideband AmplifierRF circuitsInductorthesis