Dept. of Electr. Eng., National Taiwan Univ.Lu, Shyue-KungShyue-KungLuKuo, Sy-YenSy-YenKuoWu, Cheng-WenCheng-WenWu2007-04-192018-07-062007-04-192018-07-061994-11http://ntur.lib.ntu.edu.tw//handle/246246/2007041910032443application/pdf554352 bytesapplication/pdfen-USDesign and evaluation of fault-tolerant interleaved memory systemsjournal article10.1109/ATS.1994.367206http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910032443/1/00367206.pdf