電機資訊學院: 光電工程學研究所指導教授: 黃鼎偉鄭乃嘉Cheng, Nai-ChiaNai-ChiaCheng2017-03-022018-07-052017-03-022018-07-052015http://ntur.lib.ntu.edu.tw//handle/246246/272806製作於絕緣層上矽平台的矽奈米線波導，因具有與成熟的互補式金屬氧化物半導體技術的兼容性，而在超小型光子積體電路的應用上有巨大的潛力。然而由於絕緣層上矽光子積體電路中極化相依性的問題，例如極化相依性色散以及極化相依性損耗，大大地限制了它們與現代光纖通信系統中的整合。在本論文中，一種基於水平狹縫波導結構的定向耦合器，已被成功運用來解決設計絕緣上矽的波導的基礎元件中所衍生極化相依性的問題。藉由調控準TE與準TM模態的耦合長度比率，在此發表一個十分有效率的極化分束器與極化不相依之定向耦合器。由於結構性雙折射，準TE與準TM模態在定向耦合器中的耦合效應會隨著波導結構改變。因此，藉由通過改變長寬比和波導間距，基於有限元素法的數值模擬在此被運用，以獲得高效率與緊實元件尺寸的最佳設計參數。 除此之外，水平狹縫的厚度與洩漏到真實絕緣層上矽基板的光模態功率造成的傳播損耗，兩者的關係也被詳細探究。模擬結果顯示在衰減係數以及準TE與準TM模態的耦合長度之間存在互相取捨的關係。在此論文中，所發表的極化不相依之定向耦合器的耦合長度只有6.93微米，並同時保持消光比約為15 dB 以及大於100 nm的1-dB 頻寬。對於所發表的極化分束器，其耦合長度為65.87微米並同時達到消光比大於20 dB 以及1-dB 頻寬大於30 nm 的絕佳效能。鑒於未來真實元件的製作，對於元件長度以及波導寬度製程誤差的容忍度也有著墨探討。Silicon nanowires on the silicon-on-insulator (SOI) platform have great potential for ultrasmall photonic integrated circuits (PICs) because of their compatibility with mature complementary metal-oxide-semiconductor (CMOS) technologies. However, the polarization-dependence issues such as polarization dependent dispersion and polarization-dependent loss of SOI PICs highly restrict their integration with modern fiber-optics communication system. In this thesis, horizontal slot waveguide-based directional couplers (DCs) are successfully employed to overcome the problem of polarization-dependence in designing fundamental SOI waveguide-based components. Through tailoring the ratio of the coupling lengths for quasi-TE and quasi-TM modes, a highly efficient polarization beam splitter (PBS) and a polarization-independent DC (PIDC) are proposed. Owing to structural birefringence, the coupling effects of the quasi-TE and quasi-TM modes in the DC may vary with the waveguide geometry. Therefore, numerical simulations based on finite-element method (FEM) are conducted to obtain the optimal design parameters for high efficiency and compact device size by varying the aspect ratios and waveguide spacing. Furthermore, the relation between the slot thickness and the propagation losses of optical mode power leaked into the silicon substrate of practical SOI wafer is investigated in detail. The simulation shows that there exists a trade-off between the attenuation constant and the coupling lengths of both the quasi-TE and quasi-TM modes. In the thesis, the coupling length of the proposed PIDC is only 6.93 μm, and its extinction ratio is kept at around 15 dB with a 1-dB bandwidth larger than 100 nm. For the proposed PBS, the coupling length is 65.87μm while delivering the good performance with extinction ratios of more than 20 dB and 1-dB bandwidth of larger than 30 nm. In view of future device fabrication, the fabrication-error tolerances on device length and waveguide width are also discussed.論文使用權限: 不同意授權狹縫波導絕緣上矽極化相依性極化模態色散定向耦合器slot waveguidesilicon-on-insulatorpolarization dependencepolarization-mode dispersiondirectional couplerthesis