Tseng, Po-ChihPo-ChihTsengChang, Yung-ChiYung-ChiChangHuang, Yu-WenYu-WenHuangFang, Hung-ChiHung-ChiFangHuang, Chao-TsungChao-TsungHuangChen, Liang-GeeLiang-GeeChen2009-02-252018-07-062009-02-252018-07-062005http://ntur.lib.ntu.edu.tw//handle/246246/141443This paper provides a survey of state-of-the-art hardware architectures for image and video coding. Fundamental design issues are discussed with particular emphasis on efficient dedicated implementation. Hardware architectures for MPEG-4 video coding and JPEG 2000 still image coding are reviewed as design examples, and special approaches exploited to improve efficiency are identified. Further perspectives are also presented to address the challenges of hardware architecture design for advanced image and video coding in the future.application/pdf784951 bytesapplication/pdfen-USHardware architectureH.264/AVCimage codingJPEG 2000MPEG-4very large scale integration (VLSI)video codingjournal articlehttp://ntur.lib.ntu.edu.tw/bitstream/246246/141443/1/28.pdf