劉致為臺灣大學：電子工程學研究所陳文園Chen, Wen-YuanWen-YuanChen2007-11-272018-07-102007-11-272018-07-102007http://ntur.lib.ntu.edu.tw//handle/246246/57665矽/鍺/矽異質接面量子井的band offset 對於元件特性有關鍵性的影響。矽覆蓋層可作為蔽覆層以利於閘極介電質生長以及通道的應力。相較於矽通道，鍺通道有較高的載子遷移率，然而鍺通道p型電晶體的臨界電壓 (Vth )偏移與矽覆蓋層的厚度及鍺量子井厚度有關。隨著矽覆蓋層與鍺量子井厚度增加，subthreshold slope (SS)亦增加。鍺量子井有電洞confinement效應，進而使得鍺通道漏流變大。 製作太陽電池的半導體材料非常廣泛，但以矽最為常用，包含了單晶矽、多晶與非晶矽。薄膜太陽電池由單晶矽材料製作而成，可降低材料缺陷進而使太陽電池效率提升。藉由晶元鍵合技術（wafer bonding）與smart cut，可製作Ge on glass (GOG) 金屬-氧化層-半導體 (MOS)太陽電池。模擬結果顯示單晶矽與一層薄鍺結合可提升太陽電池效率，且由商業套裝軟體Synopsys Sentaurus Tcad Simulator模擬太陽電池元件電特性，結果顯示薄鍺確實可提升太陽電池效率。 利用金屬-氧化層-半導體 (MOS) 穿隧二極體中穿隧閘極電流與累積的多數載子複合發光的特性來製作發光二極體。第四章探討矽鍺異質接面金屬-氧化層-半導體 (MOS) LED。鍺價電帶量子井的電洞與矽覆蓋層的電子複合，進而發光。The band offset at the heterojunction of Si/epi-Ge/Si quantum well can have the critical influence on device characteristics. The Si-cap can be served as a passivation layer to facilitate further gate dielectrics growth and the possible strained Si channel. Despite of the high carrier mobility of Ge than that of Si, the threshold voltage (Vth) shift of the Ge quantum well pFETs is dependent on the thickness of the Si-cap and the thickness of the Ge quantum well. As the thickness of the Si-cap and the Ge quantum well increase, the subthreshold slpoe (SS) of the Ge quantum well pFETs increases. Due to the hole confinement effect of the Ge quantum well, the drain leakage current of the Ge quantum well pFETs increases significantly. Solar cells can be fabricated from a lot of different semiconductor materials, but most commonly silicon –single crystal Si, polycrystalline Si, and amorphous Si. The thin film solar cells are based on single crystal Si, which can reduce defects resulting in the increase in efficiency. The single crystalline Ge on glass is fabricated using the wafer bonding and smart cut techniques. A simple solar cell is demonstrated using the Ge-on-glass (GOG) and a metal-oxide-semiconductor (MOS) structure. Simulation results show that the single crystal Si with a thin Ge layer can be combined to increase the efficiency of the thin film solar cells. The device simulation has been carried out by the commercial tool [Synopsys Sentaurus Tcad Simulator]. Results show that a thinner layer of Ge indeed increases the solar cell efficiency. The metal-oxide-semiconductor (MOS) tunneling diodes were utilized as light emitting diodes based on that the tunneling gate current recombines with accumulated carriers. And this results in radiative recombination. The SiGe heterojunction metal-oxide-semiconductor light-emitting diodes (MOS LED) were reported in chapter 4. Holes on the valence band edge of quantum well recombine with and the electrons on the conduction band edge, and this leads to the radiative luminescence.Chapter 1 Introduction 1.1.1 Simulation of pFETs 1 1.1.2 Simulation of Thin Film Solar Cells 4 1.1.3 Light Emission from Metal-Oxide-Silicon Light-Emitting Diodes 5 1.2 Organization 7 Reference 9 Chapter2 Heterojunction Effect on Ge Quantum Well pFETs 2.1 Introduction 11 2.2 Device Structures 13 2.3 Physics of Device Simulation 15 2.4 Results and Discussion 17 2.4.1 The Study of Vth and SS 19 2.4.2 The Study of Drain Leakage 29 2.5 Summary and Conclusion 34 Reference 35 Chapter 3 Thin Film Solar Cells with MOS Structures 3.1 Introduction 38 3.2 Solar Spectrum and Physics of Solar Cells 39 3.3 Device Structures 43 3.4 Physics of Device Simulation 45 3.5 Results and Discussion 46 3.6 Conclusion 55 Reference 57 Chapter 4 Light Emission from Metal-Oxide-Silicon Light-Emitting Diodes 4.1 Introduction 58 4.2 Device Structures 59 4.3 Physics of Device Simulation 60 4.3.1 Simulation Results of Control MOS LED 61 4.3.2 Optimization of Control Structure 67 4.3.3 Simulation Results of Heterojunction MOS LED 73 4.4 Conclusion 77 Reference 78 Chapter 5 Summary and future work 5.1 Summary 80 5.2 Future Work 824067105 bytesapplication/pdfen-US異質接面鍺通道太陽電池發光二極體heterojunctionGe channelsolar cellledthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/57665/1/ntu-96-R94943133-1.pdf