A low power 2D DCT chip design using direct 2D algorithm

Dept. of Electr. Eng., National Taiwan Univ.Chen, Liang-GeeLiang-GeeChenJiu, Juing-YingJuing-YingJiuChang, Hao-ChiehHao-ChiehChangLee, Yung-PinYung-PinLeeLIANG-GEE CHEN2007-04-192018-07-062007-04-192018-07-061998-02http://ntur.lib.ntu.edu.tw//handle/246246/2007041910031824application/pdf716816 bytesapplication/pdfen-US[SDGs]SDG7A low power 2D DCT chip design using direct 2D algorithmjournal article10.1109/ASPDAC.1998.669434http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910031824/1/00669434.pdf