Reducing code size by graph coloring register allocation and assignment algorithm for mixed-width ISA processor

Wang, J.-S.J.-S.WangWu, I-W.I-W.WuChen, Y.-S.Y.-S.ChenShann, J.J.-J.J.J.-J.ShannWEI-CHUNG HSU2018-09-102018-09-102009http://www.scopus.com/inward/record.url?eid=2-s2.0-70749111233&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/350217Reducing code size by graph coloring register allocation and assignment algorithm for mixed-width ISA processorconference paper10.1109/CSE.2009.100