2006-08-012024-05-15https://scholars.lib.ntu.edu.tw/handle/123456789/663025摘要:隨著電子產品往輕、薄、短、小發展,封裝方式也有明顯的改變,封裝形態往高I/O 密度封裝發展。於新型態封裝技術中, 覆晶( flip-chip)封裝技術佔有極大的技術優勢,勢必成為未來封裝技術主流。覆晶封裝之銲點直徑目前約為100μm,未來更將縮小到50μm。以50μm 之銲點而言,當通過銲點之電流為0.2 安培(A) 時, 此時通過銲點之電流密度將高達104 A/cm2。雖然此一電流密度仍小於Cu 或Al interconnect 內之電流密度(105-106 A/cm2 ), 但因銲料的熔點很低(約在183-230 oC 間), 此時電遷移效應已會對銲點的可靠性造成影響。1998 年Brandenburg and Yeh 研究發現, eutectic SnPb 銲料施加電流密度8 ×103 A/cm2 於150℃ 環境下經過數百小時後, 電遷移效應已對銲點可靠度造成影響[1]。其主要失效機制是在cathode 附近之銲料內生成voids,這些voids 進而造成短路。由於此一結果, 1999 年International Roadmap for Semiconductor Techn<br> Abstract: With the rapid progress of microelectronic industry, the IC packaging technology advances toward packaging with higher I/O density. The flip-chp is one of the promising technologies satisfying such trend. With the shrinking dimensions of the solder joints in flip-chip, it is anticipated that the current density in a solder joint can approach 104 A/cm2 very soon. This current density is still two orders of magnitude lower than that in Cu or Al interconnects, but solders have much lower melting point such that electromigration is a real reliability concern in flip-chip solder joints. In 1998, Brandenburg and Yeh found that eutectic PbSn joint could failed after current stressing at 8 ×103 A/cm2 and 150℃ for a few hundreds of hours [1]. The failure mechanism is due to the voids formation around the cathode in the solder. Because of this result, the electromigration is formally raised a reliability concern in the 1999 International Roadmap for Semiconductor Technology [2]. The failure mechanism of void formation around the cathode in the solder is the common observation for all the studies in the literature [1,3,4]. There is no indication of the role plays by the Under Bump Metallurgy (UBM) during electromigration. Recently, we found that UBM plays an important role in flip-chip solder joint failure [5-12]. This result also shows conclusively that current crowding is also a very important factor. Our result attracted a lot of attention in international conferences when presented [11,12]. The objective of this proposal is to study this new failure mechanism in more details. We plan to study (1) the effects of current density and environmental temperature on this new failure mechanism, (2) the effects of new UBMs scheme in inhibiting the flip-chip failure due to electromigration, and (3) the effects of solder materials on the new failure mechanism. These new knowledge will not only be helpful in solving the electromigration problems for the industry, it will also enhance our knowledge for the fundamental understanding in electromigration.電遷移覆晶current crowding銲點ElectromigrationFlip-ChipCurrent CrowdingSolder Joint電遷移對覆晶元件銲點之影響(2/3)