Enhanced power and signal integrity through layout optimization of high-speed memory systems

Weng, P.-Y.P.-Y.WengCheng, C.-H.C.-H.ChengWu, T.-L.T.-L.WuChen, C.-H.C.-H.ChenChen, J.J.ChenKuo, E.E.KuoLiao, C.-L.C.-L.LiaoMutnury, B.B.MutnuryTZONG-LIN WU2021-05-052021-05-052019https://www.scopus.com/inward/record.url?eid=2-s2.0-85085060784&partnerID=40&md5=d2d243d8b127d3b421138f45e788f002https://scholars.lib.ntu.edu.tw/handle/123456789/559277Enhanced power and signal integrity through layout optimization of high-speed memory systemsconference paper10.1109/EDAPS47854.2019.90116252-s2.0-85085060784