汪重光臺灣大學:電子工程學研究所林宜賢Lin, Yi-HsienYi-HsienLin2010-07-142018-07-102010-07-142018-07-102008U0001-2407200810421400http://ntur.lib.ntu.edu.tw//handle/246246/189039隨著多媒體應用的快速發展，具有高資料傳輸速率(data rate)的無線網路益加重要。為此，根據多輸入多輸出正交分頻多工(MIMO-OFDM)技術的IEEE 802.11n也應運而生，以提高傳輸速率。本篇論文中提出一個符合IEEE 802.11n 之數位基頻接收器設計，其中包含了符元邊界偵測、同步追蹤迴路設計、快速傅利葉轉換器以及MIMO 等化器。中首先分析二種MIMO 傳輸模式：Alamouti 以及VBLAST，而後更採取並行的方式以兼得高資料傳輸速率與高傳輸品質的優點。如此之模式可達到100Mbps，滿足11n 中資料傳輸速率的基本需求。由簡化的複數乘法器設計， 在本篇論文中提出了一個低複雜度MISO/MIMO 的等化器演算法以供Alamouti 傳輸模式。此演算法包含三個部份：通道估測、MISO/MIMO 信號偵測解碼、以及通道資訊的更新。在一般的狀況下，由此演算法設計之等化器可以減少32%乘法運算的複雜度；而在11n 的系統之中，則可以減少33%的乘法複雜度。利用室內多路徑衰減通道的系統模擬可以得知，運用此演算法之等化器能達到與傳統等化器相同的SER 表現。外，文末呈現一個64 點SISO 的快速傅利葉轉換器晶片，並以FPGA 板驗證之。藉由分析系統需求，可以計算出SDF 管線架構之傅利葉轉換器的各項參數。經過改良後的複數乘法器設計以及適當之記憶體安排，在0.18 μm CMOS製程下，此傅利葉轉換器晶片的核心面積為0.570 mm × 0.565 mm；在40 MHz之工作頻率下，消秏功率為10.8 mW。最後，透過Altera Stradix EP1S80 FPGA板，並以Tektronix TLA 715 邏輯分析儀量測，此傅利葉轉換器功能之正確性得到了驗證。The high data-rate wireless transmission is the demand for many multimedia applications. For this purpose, IEEE 802.11n is the wireless LAN standard to offer higher throughput based on MIMO-OFDM techniques. In this thesis, a digital baseband receiver is presented for IEEE 802.11n, including the initial boundary detection, synchronization tracking loop, FFT, and MIMO equalization.or MIMO transmission schemes, Alamouti and VBLAST are presented here. Furthermore, the combined scheme is taken to achieve both of the advantages, i.e. higher data rate and better quality. The combined scheme can satisfy a 100Mbps requirement of IEEE 802.11n standard.ased on strength-reduced complex multiplication, a cost e cient MISO/MIMO equalization is proposed for Alamouti scheme. The cost efficient MISO/MIMO equalization contains three parts: channel estimation, MISO/MIMO detection and updating process. The overall algorithm can reduce 32 % multiplication complexity in general case compared with 33 % in 11n case. The system performance of this design is the same as the conventional technique evaluated by the uncoded SER simulation over indoor multipath fading channel.inally, a 64-point SISO FFT/IFFT processor is realized in the chip design and evaluated by FPGA board. By analyzing the system performance, the parameters of FFT/IFFT can be derived for SDF pipeline structure. By multiplierless design and memory arrangement, the chip core area occupies 0.570 mm x 0.565 mm and consumes 10.8 mW at operating frequency 40MHz using 0.18 um CMOS technology. The FFT/IFFT functionality is also veri ed by Altera Stradix EP1S80 FPGA board and Tektronix TLA 715.1 Introduction 1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . 1.2 Thesis Overview . . . . . . . . . . . . . . . . . . 3 Principles of MIMO-OFDM 5.1 OFDM technique . . . . . . . . . . . . . . . . . . . 5.1.1 OFDM Signal Model . . . . . . . . . . . . . . . . 5.1.2 Guard interval and Cyclic Prefix . . . . . . . . . 7.2 MIMO technique . . . . . . . . . . . . . . . . . . . 9.2.1 MIMO Signal model . . . . . . . . . . . . . . . . 9.2.2 MIMO Channel Capacity . . . . . . . . . . . . . . 10.2.3 Space Diversity . . . . . . . . . . . . . . . . . 10.2.4 MIMO transmission schemes . . . . . . . . . . . . 11.3 MIMO-OFDM technique . . . . . . . . . . . . . . . . 12 System Speci cation 15.1 An Overview of Wireless LAN . . . . . . . . . . . . 15.2 IEEE 802.11n Speci cation . . . . . . . . . . . . . 17.2.1 Packet Formats . . . . . . . . . . . . . . . . . . 18.2.2 System Parameters . . . . . . . . . . . . . . . . 19.2.3 HT-LTF Arrangement . . . . . . . . . . . . . . . . 20.2.4 Pilot Structure . . . . . . . . . . . . . . . . . 22.2.5 Constellation Mapping . . . . . . . . . . . . . . 22.2.6 Space-Time Encoder . . . . . . . . . . . . . . . . 23 Wireless Channel Model 25.1 MIMO Channel . . . . . . . . . . . . . . . . . . . . 25.2 Spatial Correlation . . . . . . . . . . . . . . . . 27.3 Multipath Rayleigh Fading . . . . . . . . . . . . . 28.4 Path Loss and Shadowing . . . . . . . . . . . . . . 30.5 Additive White Gaussion Noise . . . . . . . . . . . 31.6 Timing Frequency Offset. . . . . . . . . . . . . . . 31.7 Carrier Frequency Offset . . . . . . . . . . . . . . 32 Receiver Design 33.1 Packet Detection . . . . . . . . . . . . . . . . . . 34.1.1 Coarse Symbol Boundary Detection . . . . . . . . . 34.1.2 Fine Symbol Boundary Detection . . . . . . . . . . 35.2 CFO estimation . . . . . . . . . . . . . . . . . . . 37.2.1 Coarse/Fine CFO Estimation . . . . . . . . . . . . 37.2.2 Residual CFO Tacking Loop . . . . . . . . . . . . 38.3 Phase Compensation . . . . . . . . . . . . . . . . . . . . . . 40 MIMO Equalization Design 43.1 Channel estimation . . . . . . . . . . . . . . . . . 44.2 MIMO Detection . . . . . . . . . . . . . . . . . . . 46.2.1 Alamouti Scheme . . . . . . . . . . . . . . . . . 47.2.2 VBLAST Scheme . . . . . . . . . . . . . . . . . . 49.2.3 Combined scheme of Alamouti and VBLAST . . . . . . 50.2.4 System Simulation Results . . . . . . . . . . . . 54.3 LMS Adaptation for STBC . . . . . . . . . . . . . . 56.4 Cost Effcient MIMO Equalization . . . . . . . . . . 59.4.1 Strength-Reduced Multiplication . . . . . . . . . 59.4.2 Cost Effcient MISO/MIMO Detection . . . . . . . . 59.4.3 Cost Effcient Updating . . . . . . . . . . . . . . 64.4.4 Cost Effcient Channel Estimation . . . . . . . . . 67.4.5 Comparisons and System Simulation . . . . . . . . 69FT/IFFT Hardware Implementation 73FT/IFFT Algorithm . . . . . . . . . . . . . . . . . . . 73FT/IFFT Architecture . . . . . . . . . . . . . . . . . 75ixed-Point Analysis . . . . . . . . . . . . . . . . . . 77ardware Consideration . . . . . . . . . . . . . . . . . 79.4.1 Processing Element . . . . . . . . . . . . . . . . 79.4.2 Memory Arrangement . . . . . . . . . . . . . . . . 80.4.3 Twiddle Factor Design . . . . . . . . . . . . . . 81.4.4 FFT/IFFT Transform . . . . . . . . . . . . . . . . 83PGA Emulation and Chip Implementation . . . . . . . . . 84.5.1 FPGA Emulation Results . . . . . . . . . . . . . . 86.5.2 Gate-Level Simulations and Chip Summary . . . . . 87onclusion 912772425 bytesapplication/pdfen-US多輸入多輸出正交分頻多工時空區塊編碼等化器傅利葉轉換器MIMOOFDMSTBCFEQFFTthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/189039/1/ntu-97-R95943028-1.pdf