黃俊郎臺灣大學：電子工程學研究所洪自立Hung, Tzu-LiTzu-LiHung2007-11-272018-07-102007-11-272018-07-102006http://ntur.lib.ntu.edu.tw//handle/246246/57477近年來無線通訊的普及化與方便性使射頻積體電路一躍而成市場上的寵兒。隨著人們對其的依賴日益增加，大量生產所帶來的低毛利率已使得測試成本對於整體產業的獲利佔有舉足輕重的地位。尤其是在不斷提昇的傳輸速率要求下，無線通訊正逐步向更高的頻段發展，測試時乃需要投入更高的資本以滿足高速信號的量測。 射頻積體電路的測試技術發展行之有年，始終缺乏一套系統性、廣為接受的方法，肇因於射頻積體電路被關切的不僅有常見的製程缺陷如導線斷路或短路等現象，尚有受到製程漂移影響而導致的參數變異。針對後者的量測傳統上是導入自動化測試設備以產生特定的輸入信號並且直接針對所求的參數做量測。然而高頻的量測儀器所費不貲，促使研究人員發展更有效率且更廉價的測試方法，其中最為廣泛使用的迴路連接自我測試，是利用無線收發機中的發送端產生輸入訊號，並直接經由外部回授傳回接收機，經過降頻至基頻之後即可由低成本的測試機台所收集並分析。 然而傳統的迴路連接測試忽略了在發送端發生錯誤時，系統並無有效的方法可以偵測得知。特別是積體電路的整合密度不斷提高，信號線之間產生的相互干擾如串音等現象，皆會對訊號的純淨度造成相當程度的破壞。因而本論文提出一個創新的測試方法，利用射頻接收機的基本電路架構，參考頻譜分析儀的原理，可針對射頻收發機中常用的鎖相迴路頻率合成器作功能上的測試，同時對於傳統的射頻電路參數，例如放大增益、線性度等也能夠加以評估。本方法是透過收集射頻收發機電路中的信號強度指標來作為量測的響應，基於此信號屬於低頻近乎直流的特性，後續的量測便能使用較為廉價的測試儀器以節省成本。 本論文中使用軟體模擬建立一個藍芽無線通訊系統，為所提出的測試方法提供一驗證的環境。經過對射頻收發機的電路作行為模擬與導入非理想效應之後，證明本測試方法能夠有效無誤的達成量測目標。Wireless communication has become more appealing than ever due to its convenience and popularity. As the demand increasing explosively, mass production has brought down the gross profit and test cost has emerged as an important part in the overall revenue. RF communication is evolving towards higher-frequency band to provide higher transmission speed, requiring more investment in test equipments cost. RF testing technologies have been developed for many years. In lack of a systematic and widely-accepted methodology, RF testing diversifies because the test includes not only the common spot defect such as open or short circuits, but the parametric drift caused by process variation. Traditionally the parametric tests are carried out on automatic test equipments (ATE). ATE can generate the required test stimuli and directly measure the interested parameters. Nevertheless extravagantly-cost high-speed ATE has urged the development of more efficient and inexpensive test methods. The loop-back test is among one of the most popular technique. It utilizes the RF transmitter as the test stimuli generator, and gathers the response at the baseband end after the downconversion process handled by the receiver circuits, eliminating the requirement of high-end ATE. Loop-back technique neglected the occurrence of a faulty transmitter. In such a case the fault cannot be detected by the test system. The increasing density of integration has raised the severity of coupling effect, such as crosstalk between signals, introducing the degradation on signal quality. In this thesis a novel RF testing technique based on spectral power extraction is presented. Inspired by the topology of the spectrum synthesizer, the proposed method exploits the on-chip RF receiver chain to test for the phase-locked loop (PLL) frequency synthesizer. Parameters such as gain, nonlinearity can be evaluated as well. By measuring the dc-like output of the received-signal strength indicator (RSSI) the test cost is reduced since low-cost ATE can replace the high-end ones. We use software simulation to verify the proposed method by applying it to a Bluetooth transceiver model. The non-ideality is injected into the behavior models of the circuit blocks. The proposed method is proved effective and accurate in measurement of test targets.Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Brief Description 2 1.3 Thesis Overview 3 Chapter 2 Fundamentals of Radio-Frequency Communication 5 2.1 Introduction 5 2.2 Basic Concepts in RF Design 5 2.2.1 Effects of Nonlinearity 5 2.2.2 Cross Modulation 6 2.2.3 Intermodulation 6 2.2.4 Cascaded Nonlinear Stages 10 2.2.5 Sensitivity and Dynamic Range 11 2.3 Architectures of RF Transceivers 12 2.3.1 General Considerations 12 2.3.2 Heterodyne Architecture 13 2.3.3 Homodyne Architecture 15 2.3.4 Transceiver Performance Tests 16 2.4 Basic Circuit Components 17 2.4.1 Low-Noise Amplifiers 17 2.4.2 Downconversion Mixers 18 2.4.3 Local Oscillator 19 2.5 Summary 24 Chapter 3 A General Study of RF Testing Methodologies 25 3.1 Introduction 25 3.2 General Considerations 25 3.2.1 Challenges in RF Testing 25 3.2.2 Fault Models 26 3.2.3 Testing Approach Classification 27 3.3 Prior Works in RF Testing 29 3.3.1 Multisite Testing 29 3.3.2 Delayed-RF Testing 30 3.3.3 Alternate Loop-back Testing 32 3.3.4 Built-In Test with Embedded Sensors 34 3.4 Summary 36 Chapter 4 An RF Design-for-Test Architecture Using Spectral Power Extraction Technique 37 4.1 Introduction 37 4.2 Basic Concepts of Power Spectral Extraction Technique 37 4.2.1 Motivation 37 4.2.2 Inspiration 38 4.3 Proposed DfT Methodology 40 4.3.1 General Description and System Overview 40 4.3.2 Analysis on the RSSI 43 4.3.3 Frequency Synthesizer Sweep Test 44 4.3.4 IIP3 Test 54 4.4 Discussion on the DfT circuits 56 4.5 Summary 58 Chapter 5 Simulation Setup and Experimental Results 59 5.1 Introduction 59 5.2 Overview of Bluetooth System 59 5.3 Models of Frequency Synthesizers 60 5.3.1 Integer-N Frequency Synthesizer 60 5.3.2 Fractional-N Frequency Synthesizer 64 5.4 Models of the RF Receiver 66 5.4.1 LNA and Downconversion Mixer 67 5.4.2 Limiting Amplifier with RSSI 68 5.4.3 Overall RF Receiver Chain 68 5.5 Simulation Results 69 5.6 Discussion 73 5.7 Summary 75 Chapter 6 Conclusion 77 Bibliography 791469797 bytesapplication/pdfen-US內建自我測試可測試性設計類比測試混合式信號測試射頻電路測試收發器測試BISTDfTAnalog testMixed-signal testRF testTransceiver Testthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/57477/1/ntu-95-R92943023-1.pdf