Observation of Quasi-Saturation Phenomenon in Sidewall Gate GaN Vertical Transistors

Chang, Chih-KangChih-KangChangZhang, Zhi-XiangZhi-XiangZhangLi, Ting-CiTing-CiLiWang, Jun-XiangJun-XiangWangChu, Yu-ChuanYu-ChuanChuWang, Ting-ITing-IWangMIIN-JANG CHENWang, Tien-YuTien-YuWangLai, Wei-ChihWei-ChihLaiHuang, Jian-JangJian-JangHuang2025-11-272025-11-272025-10-14https://www.scopus.com/record/display.uri?eid=2-s2.0-105019198525&origin=resultslisthttps://scholars.lib.ntu.edu.tw/handle/123456789/734186We report the observation of quasi-saturation behavior in GaN vertical metal oxide semiconductor field-effect transistors featuring a sidewall-gate architecture. Compared to conventional trench-gate designs, the sidewall-gate structure exhibits pronounced drain current roll-off and negative transconductance under high gate bias. This degradation is consistent with space charge modulation, wherein localized electron accumulation at the gate-drift interface distorts the electric field distribution and limits carrier mobility. Comprehensive electrical characterization and technology computer-aided design simulations reveal how asymmetric gate geometry affects vertical and lateral electron spreading paths. These findings highlight the role for mitigating field-induced current degradation in vertical GaN power devices.truecurrent crowdingquasi-saturationsidewall gatespace charge modulationvertical GaN MOSFETsObservation of Quasi-Saturation Phenomenon in Sidewall Gate GaN Vertical Transistorsjournal article10.1021/acsaelm.5c014122-s2.0-105019198525