Constrained Via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problems

Fang, S. C.S. C.FangChang, K. E.K. E.Chang馮武雄陳少傑Feng, Wu-ShiungWu-ShiungFengChen, Sao-JieSao-JieChen2009-02-042018-07-062009-02-042018-07-061991http://www.scopus.com/inward/record.url?eid=2-s2.0-0026175672&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/293550en-USConstrained Via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problemsconference paper