Cheng, Sheng JenSheng JenChengJang, Sheng LyangSheng LyangJangChen, HuiHuiChenHong, Chung HungChung HungHongCHUNG-PING CHEN2023-08-212023-08-212023-01-019798350334166https://scholars.lib.ntu.edu.tw/handle/123456789/634626This letter proposes a current-reused frequency doubler-Darington amplifier (FD-DA) aiming at enlarging the doubler signal. Conventional active balanced frequency doubler can output a signal with the frequency beyond fmax and ft of transistor, but the output strength is small. Normal transistor amplifier can't amplify this signal. Darlington amplifier (DA) is also called ft-doubler can amplify the signal at a frequency beyond ft. In the proposed circuit, the DA stacks on a frequency doubler (FD). The current-reused circuit accepts an input signal from a voltage-controlled-oscillator (VCO). To reduce the power consumption and to improve the phase-noise performance, a capacitance-splitting and a gate-drain impedance-balancing technique are realized with an inductive divider. The 16 GHz frequency source has been designed and fabricated in the TSMC 0.18 μ m 1P6M CMOS technology. The measured output power of the fundamental signal and second-harmonic signal are -4.61 and -4.95 dBm, respectively. The measured tuning ranges of the fundamental signal and second-harmonic signal are from 7.52 to 7.885 and 15.04 to 15.77 GHz, respectively. The measured phase noise of the fundamental signal and second-harmonic is -104.96 and -105.12 dBc/Hz at 1MHz offsets, respectively. The frequency source total power consumption is 8.74 mW. The whole chip occupies a small area of 1.07×1.19 mm2.CMOS | current-reused | Darlington amplifier (DA) | frequency doubler (FD) | gm-boosted | push-push pair | voltage-controlled oscillator (VCO)[SDGs]SDG7conference paper10.1109/VLSI-TSA/VLSI-DAT57221.2023.101344552-s2.0-85162994539https://api.elsevier.com/content/abstract/scopus_id/85162994539