Nie, Szu RuSzu RuNieChen, Yen TingYen TingChenYAO-WEN CHANG2023-06-152023-06-152022-07-1097814503914290738100Xhttps://scholars.lib.ntu.edu.tw/handle/123456789/632691In modern VLSI designs, I/O counts have been growing continuously as the system becomes more complicated. To achieve higher routability, the hexagonal array is introduced with higher pad density and a larger pitch. However, the routing for hexagonal arrays is significantly different from that for traditional gird and staggered arrays. In this paper, we consider the Y-architecture-based flip-chip routing used for the hexagonal array. Unlike the conventional Manhattan and the X-architectures, the Y-architecture allows wires to be routed in three directions, namely, 0-, 60-, and 120-degrees. We first analyze the routing properties of the hexagonal array. Then, we propose a triangular tile model and a chord-based internal node division method that can handle both pre-assignment and free-assignment nets without wire crossing. Finally, we develop a novel dynamic programming-based bend minimization method to reduce the number of routing bends in the final solution. Experimental results show that our algorithm can achieve 100% routability with minimized total wirelength and the number of routing bends effectively.conference paper10.1145/3489517.35305772-s2.0-85137445905https://api.elsevier.com/content/abstract/scopus_id/85137445905