國立臺灣大學電機工程學系暨研究所陳少傑2006-07-252018-07-062006-07-252018-07-061999-07-31http://ntur.lib.ntu.edu.tw//handle/246246/7715本研究計畫乃為期三年之整合計畫， 在第一年已完成PGA 封裝繞線器的下列 步驟: (一) 繞線指定層步驟、(二) 拓樸繞線 步驟、(三) 幾何繞線步驟。在第二年亦已 完成將第一年之 PGA 繞線器修改成了可 應用在BGA 封裝上之目標。今年第三年計 畫主要為完成(一) 移殖 PGA 及 BGA 繞線器至視窗環境及 Windows 作業平 台、(二) 完成MCM 繞線器與PGA 或 BGA 繞線器之間的系統整合測試。本計畫 之繞線器完成後，可支援使用多晶片模組 (MCM) 系統在封裝上面的繞線。The research plan is three-years based. We have already developed an MCM PGA packaging router at the first year and finished the following phases: layer assignment, topological routing, and geometric routing. At the second year, we have also developed an MCM BGA packaging router. At this year, the overall design will be divided into the following phrases: (i) Implant the MCM PGA and BGA package routers from Sun Workstation to Windows environment and platform. (ii) Integrate and test our packaging routers with the other MCM subsystem. Our PGA and BGA package routers couple tightly with other subprojects, and can be integrated into other MCM systems developed by our CAD research groups.application/pdf368346 bytesapplication/pdfzh-TW國立臺灣大學電機工程學系暨研究所reporthttp://ntur.lib.ntu.edu.tw/bitstream/246246/7715/1/882216E002017.pdf