電機資訊學院: 電子工程學研究所指導教授: 李致毅陳力揚Chen, Li-YangLi-YangChen2017-03-062018-07-102017-03-062018-07-102014http://ntur.lib.ntu.edu.tw//handle/246246/276336隨著交通量的增加，車禍發生的次數與日俱增，交通的控制以及車輛行車安全成為一重要議題。 本論文提出一利用65奈米互補式金屬氧化半導體製程之24-GHz連續波與連續波頻率調變雷達。接收器與發射器晶片組由帶隙參考電壓電路、鎖相迴路、功率放大器、低雜訊放大器、混頻器、多相濾波器所組成。藉由次諧波注入鎖相迴路以及溫度補償的技巧，鎖相迴路量測結果達到在1-MHz 偏移頻率下 −95dBc/Hz的相位雜訊，並且方均根時脈抖動從溫度−10度至80度皆能低於600毫微微秒。接發機前端電路晶片組與天線、類比基帶處理器、電源模組、數位訊號處理器與使用者介面整合成一雷達模組。其量測結果亦在本論文中作呈現，在發射器提供14.7分貝毫瓦的功率以及接收器37.2分貝的增益下，雷達能偵測到50公尺以外車輛之速度與行進方向。Worldwide we’re experiencing an ever fast growth of traffic congestion yielding an increasing number of car accidents. The need for higher traffic control efficiency and increased driver safety becomes of primary importance. This thesis presents a solution of 24-GHz continuous-wave and frequency-modulated continuous-wave radar in 65-nm standard digital CMOS technology. The transceiver chipsets include bandgap reference, phase-locked loop, power amplifier, low-noise amplifier, I/Q mixer, poly-phase filter. Subharmonically injection-locked phase-locked loop (SILPLL) and temperature compensation technique are utilized in radar transceiver to provide more stable and accurate result. Measurement result shows that the SILPLL achieves the phase noise of −95dBc/Hz at 1-MHz offset, and root-mean-square jitter is lower than 600fs from −10°C to 80°C. The transceiver front-end also integrated with antenna, analog baseband, power module, digital signal processor and user interface for radar operation. The measurement result of radar module also performed in this thesis. With the power amplifier providing 14.7dBm of output power, and receiver conversion gain of 37.2dB, the radar can detect the speed and direction of vehicles from 50-m away.論文使用權限: 不同意授權連續波雷達連續波頻率調變雷達24-GHz次諧波注入鎖相迴路溫度補償continuous-wave(CW)radarfrequency modulated continuous-wave (FMCW) radarsubharmonically injection-locked phase-locked loop (SILPLL)temperature compensation[SDGs]SDG9thesis