國立臺灣大學電機工程學系Chen, Huang-YuHuang-YuChenChiang, Mei-FangMei-FangChiangChang, Yao-WenYao-WenChangChen, LumdoLumdoChenHan, BrianBrianHan2006-09-282018-07-062006-09-282018-07-062006http://ntur.lib.ntu.edu.tw//handle/246246/2006092815521107http://ntur.lib.ntu.edu.tw/bitstream/246246/2006092815521107/1/dac06.pptIntroduction Redundant-Via Aware Two-Pass Routing System Post-Layout Double-Via Insertion Algorithm Experimental Result Conclusionapplication/ppt1323008 bytesapplication/vnd.ms-powerpointzh-TWNovel Full-Chip Gridless Routing Considering Double-Via Insertionreporthttp://ntur.lib.ntu.edu.tw/bitstream/246246/2006092815521107/1/dac06.ppt