電機資訊學院: 電信工程學研究所指導教授: 吳宗霖許毅安Hsu, Yi-AnYi-AnHsu2017-03-062018-07-052017-03-062018-07-052016http://ntur.lib.ntu.edu.tw//handle/246246/276182本論文主要分析三維積體電路中，由於矽穿孔上電流產生的基板雜訊對電路造成的影響。透過參考三維傳輸線矩陣方法，本文提出一準確之等效電路模型，可以在極近的矽穿孔間距之下，得到準確的基板雜訊模擬結果。在提出的等效電路模型中，考慮了矽基板的半導體效應，以及用八角型等效電路模擬圓柱型的矽穿孔。為驗證提出之預測方法，本文利用ANSYS HFSS以及TCAD Sentaurus等模擬軟體分別進行頻域以及時域的驗證。本論文亦利用所提出的等效電路模型，進行基板上之熱生成預測，以及和主動電路進行共模擬，得到主動電路受基板雜訊的影響。In this research, the influence of the substrate noise induced by the through silicon via in 3-D ICs is analyzed. An equivalent circuit model is proposed based on the 3-D transmission line matrix (3-D TLM) method. The proposed equivalent circuit model is able to predict the substrate noise accurately under extremely small P/D ratio of the TSVs, and the semiconductor effect is considered. To verify the proposed model, ANSYS HFSS and TCAD Sentaurus are used in frequency and time domain simulation. The proposed model can also be used in the heat generation prediction on the silicon substrate and the co-simulation with the active circuit.3793751 bytesapplication/pdf論文公開時間: 2021/7/26論文使用權限: 同意有償授權(權利金給回饋學校)三維積體電路矽穿孔基板雜訊基板熱生成三維傳輸線矩陣等效電路模型3-D ICthrough silicon via (TSV)substrate noiseheat production on substrate3-D transmission line matrix (3-D TLM) methodequivalent circuit modelthesis10.6342/NTU201600933http://ntur.lib.ntu.edu.tw/bitstream/246246/276182/1/ntu-105-R02942141-1.pdf