Graduate Inst. of Electron. Eng., National Taiwan Univ.Tseng, Po-ChihPo-ChihTsengHuang, Chao-TsungChao-TsungHuangLIANG-GEE CHEN2007-04-192018-07-062007-04-192018-07-062002-10http://ntur.lib.ntu.edu.tw//handle/246246/2007041910021070https://www.scopus.com/inward/record.uri?eid=2-s2.0-0344436241&doi=10.1109%2fAPCCAS.2002.1114971&partnerID=40&md5=5b95aa8f78866d5b6e881f88266303d5In this paper, by using line-based methods, a generic RAM-based architecture is proposed to construct the corresponding two-dimensional architectures efficiently for any given hardware architecture of one-dimensional wavelet filters, including conventional convolution-based and advanced lifting-based architectures. The categories of line buffer and the strategy to optimize the size of internal memory are also described. For multi-level two-dimensional discrete wavelet transforms, the recursive pyramid algorithm is adopted to turn our proposed architecture into another efficient architecture. According to the comparison results, the proposed architecture outperforms previous arts in the aspects of memory size, control complexity, and flexibility. © 2002 IEEE.application/pdf434049 bytesapplication/pdfen-USArithmetic; Chaos; Computer architecture; Costs; Digital signal processing; Discrete wavelet transforms; Filters; Hardware; Image coding; Random access memory[SDGs]SDG11Chaos theory; Computer architecture; Computer hardware; Costs; Digital arithmetic; Digital signal processing; Filters (for fluids); Hardware; Image coding; Memory architecture; One dimensional; Random access storage; Signal processing; Wavelet transforms; Efficient architecture; Hardware architecture; Lifting-based architectures; Proposed architectures; RAM-based architectures; Random access memory; Recursive pyramid algorithms; Two-dimensional discrete wavelet transform; Discrete wavelet transformsjournal article10.1109/APCCAS.2002.11149712-s2.0-0344436241http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021070/1/01114971.pdf