Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
---|---|---|---|---|---|---|
2009 | Fault Modeling and Testing of Retention Flip-Flops in Low Power Designs | CHIEN-MO LI ; B. C. Bai; A. K Li; J. C.M. Li; K. C. Wu; CHIEN-MO LI | Asia and South Pacific Design Automation Conference, ASP-DAC | |||
2017 | PSN-aware Circuit Test Timing Prediction using Machine Learning | B. Liu; J. C.M. Li; CHIEN-MO LI | IET Computers & Digital Techniques | 9 | 6 |