公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
---|---|---|---|---|---|---|
2003 | A PCI-X Verification Environment Using C and Verilog | K. H. Chang; Y. C. Su; W. T. Tu; Y. J. Yeh; S. Y. Kuo; SY-YEN KUO | 14th VLSI Design/CAD Symposium | |||
2003 | A Tag-Augmented Temporal Logic Checker | K. H. Chang; W. T. Tu; Y. J. Yeh; S. Y. Kuo; SY-YEN KUO | 14th VLSI Design/CAD Symposium | |||
2004 | A Temporal Assertion Extension to Verilog | K. H. Chang; W. T. Tu; Y. J. Yeh; S. Y. Kuo; SY-YEN KUO | 2nd International Symposium on Automated Technology for Verification and Analysis(ATVA04) | 1 | 0 | |
2010 | Accurately Handle Don’t-Care Conditions in High-Level Designs and Application for Reducing Initialized Registers | H. Z. Chou; K. H. Chang; S. Y. Kuo; SY-YEN KUO | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 12 | 11 | |
2011 | Applying Verification Intention for Design Customization via Property Mining under Constrained Testbenches | C. N. Chung; C. W. Chang; K. H. Chang; S. Y. Kuo; SY-YEN KUO | International Conference on Computer Design (ICCD 2011) | 4 | 0 | |
2010 | Automatic Constraint Generation for Software-Based Post-Silicon Bug Repair | H. Z. Chou; K. H. Chang; S. Y. Kuo; SY-YEN KUO | 19th International Workshop on Logic and Synthesis(IWLS 2010) | |||
2005 | Automatic Partitioner for Behavior Level Distributed Logic Simulation | K. H. Chang; J. Y. Kang; H. W. Wang; W. T. Tu; Y. J. Yeh; S. Y. Kuo; SY-YEN KUO | 25th IFIP WG 6.1 International Conference (FORTE 2005) | 1 | 0 | |
2004 | Automatic Partitioner for Distributed Parallel Logic Simulation | K. H. Chang; H. W. Wang; Y. J. Yeh; S. Y. Kuo; SY-YEN KUO | 15th VLSI Design/CAD Symposium | 4 | ||
2003 | Automatic Partitioner for Distributed Simulation | K. H. Chang; W. T. Tu; Y. J. Yeh; S. Y. Kuo; SY-YEN KUO | 14th VLSI Design/CAD Symposium | |||
2010 | Automating Unreachable Code Diagnosis and Debugging | H. Z. Chou; K. H. Chang; S. Y. Kuo; SY-YEN KUO | 19th International Workshop on Logic and Synthesis(IWLS 2010) | |||
2011 | Crystallization Temperature and Activation Energy of As-spun Ti52.0Ni38.5Cu9.5 Ribbon | K. H. Chang; S. K. Wu* | Thin Solid Films | |||
2008 | Efficiency on Snake Robot Locomotion with Constant and Variable Bending Angles | K. H. Chang; Y. Y. Chen; YUNG-YAW CHEN | ARSO 2008 | 3 | 0 | |
2009 | Enhancing Bug Hunting Using High-Level Symbolic Simulation | H. Z. Chou; I. H. Lin; C. S. Yang; K. H. Chang; S. Y. Kuo; SY-YEN KUO | 2009 ACM Great Lake Symposium on VLSI (GLSVLSI-2009) | 5 | 0 | |
2011 | Facilitating Unreachable Code Diagnosis and Debugging | H. Z. Chou; K. H. Chang; S. Y. Kuo; SY-YEN KUO | 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011) | 2 | 0 | |
2010 | Finding Reset Nondeterminism in RTL Designs–Scalable X-Analysis Methodology and Case Study | H. Z. Chou; H. Yu; K. H. Chang; D. Dobbyn; S. Y. Kuo; SY-YEN KUO | 2010 Design, Automation & Test in Europe (DATE 2010) | 9 | 0 | |
2011 | Formal Reset Recovery Slack Calculation at the Register Transfer Level | C. N. Chung; C. W. Chang; K. H. Chang; S. Y. Kuo; SY-YEN KUO | 2011 Design, Automation & Test in Europe Conference (DATE 2011) | 1 | 0 | |
2009 | Handling Don't-Care Conditions in High-LevelSynthesis and Application for Reducing Initialized Registers | H. Z. Chou; K. H. Chang; S. Y. Kuo; SY-YEN KUO | 46th ACM/IEEE Design Automation Conference (DAC-2009) | 8 | 0 | |
2016 | Handling Nondeterminism in Logic Simulation So That Your Waveform Can Be Trusted Again | H. Z. Chou; K. H. Chang; S. Y. Kuo; SY-YEN KUO | IEEE Design & Test of Computers | 3 | 2 | |
2012 | Improvement on the Thickness-direction Resolution of 2D US Image Positioning | Z. H. Li; K. H. Chang; T. C. Chen; M. C. Ho; F. L. Lian; J. Y. Yen; W. L. Lin; Y. Y. Chen; YUNG-YAW CHEN | International Automatic Control Conference | |||
2010 | Optimizing Blocks in an SoC Using Symbolic Code-Statement Reachability Analysis | H. Z. Chou; K. H. Chang; S. Y. Kuo; SY-YEN KUO | 15th Asia and South Pacific Design Automation Conference (ASP-DAC 2010) | 5 | 0 |