Results 1-128 of 128 (Search time: 0.009 seconds).
Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link | |
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1 | 2023 | MultiFuse: Efficient Cross Layer Fusion for DNN Accelerators with Multi-level Memory Hierarchy | Chang, Chia Wei; Liou, Jing Jia; Huang, Chih Tsun; WEI-CHUNG HSU ; Lu, Juin Ming | Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors | |||
2 | 2022 | Accelerating Video Captioning on Heterogeneous System Architectures | Huang, Horng Ruey; Hong, Ding Yong; Wu, Jan Jan; Chen, Kung Fu; PANGFENG LIU ; WEI-CHUNG HSU | ACM Transactions on Architecture and Code Optimization | 1 | 1 | |
3 | 2021 | Efficient video captioning on heterogeneous system architectures | Huang H.-R; Hong D.-Y; Wu J.-J; PANGFENG LIU ; WEI-CHUNG HSU | Proceedings - 2021 IEEE 35th International Parallel and Distributed Processing Symposium, IPDPS 2021 | 3 | 0 | |
4 | 2021 | Intra- And Inter- Layer Transformation to Reduce Memory Traffic for CNN Computation | Liao P.-W; WEI-CHUNG HSU ; SHIH-WEI LIAO | ACM International Conference Proceeding Series | 1 | 0 | |
5 | 2019 | Processor-tracing guided region formation in dynamic binary translation | Hong, D.-Y.; Wu, J.-J.; Liu, Y.-P.; Fu, S.-Y.; WEI-CHUNG HSU | ACM Transactions on Architecture and Code Optimization | |||
6 | 2019 | Translating Traditional SIMD Instructions to Vector Length Agnostic Architectures. | Fu, Sheng-Yu; WEI-CHUNG HSU | IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2019, Washington, DC, USA, February 16-20, 2019 | |||
7 | 2019 | Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translator | Fu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; WEI-CHUNG HSU | Journal of Systems Architecture | |||
8 | 2019 | Efficient Dynamic Device Placement for Deep Neural Network Training on Heterogeneous Systems. | Huang, Zi Xuan; Fu, Shen Yu; WEI-CHUNG HSU | Embedded Computer Systems: Architectures, Modeling, and Simulation - 19th International Conference, SAMOS 2019, Samos, Greece, July 7-11, 2019, Proceedings | |||
9 | 2019 | Enhancing Transactional Memory Execution via Dynamic Binary Translation | Hong, Ding-Yong; Lin, Shih-Kai; Fu, Sheng-Yu; Wu, Jan-Jan; WEI-CHUNG HSU | Applied Computing Review | 0 | 0 | |
10 | 2019 | Exploiting SIMD asymmetry in Arm-to-X86 dynamic binary translation | Liu, Y.-P.; Hong, D.-Y.; Wu, J.-J.; Fu, S.-Y.; WEI-CHUNG HSU | ACM Transactions on Architecture and Code Optimization | |||
11 | 2018 | A Pipeline-Based Heterogeneous Framework for Efficient Synthetic Light Field Rendering | Kao, Chih-Chen; Tseng, Liang-Chi; WEI-CHUNG HSU | Applied Computing Review | |||
12 | 2018 | Exploiting SIMD capability in an ARMv7-to-ARMv8 dynamic binary translator. | Fu, Sheng-Yu; Lin, Chih-Min; Hong, Ding-Yong; Liu, Yu-Ping; Wu, Jan-Jan; WEI-CHUNG HSU | Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2018, Torino, Italy, September 30 - October 05, 2018 | |||
13 | 2018 | Work-in-Progress: Exploiting SIMD Capability in an ARMv7-to-ARMv8 Dynamic Binary Translator | Fu, S.-Y.; Lin, C.-M.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; WEI-CHUNG HSU | 2018 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2018 | |||
14 | 2018 | Automatically migrating sequential applications to heterogeneous system architecture | Liang, C.-Y.; Fu, S.-Y.; Liu, Y.-P.; WEI-CHUNG HSU | Proceedings - 2018 International Conference on High Performance Computing and Simulation, HPCS 2018 | 0 | 0 | |
15 | 2018 | Efficient and retargetable SIMD translation in a dynamic binary translator | Fu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; WEI-CHUNG HSU | Software - Practice and Experience | |||
16 | 2018 | Exploring hidden coherency of Ray-Tracing for heterogeneous systems using online feedback methodology | Kao, C.-C.; WEI-CHUNG HSU | Visual Computer | |||
17 | 2018 | Improving SIMD parallelism via dynamic binary translation | Hong, D.-Y.; Liu, Y.-P.; Fu, S.-Y.; Wu, J.-J.; WEI-CHUNG HSU | ACM Transactions on Embedded Computing Systems | |||
18 | 2018 | Efficient synthetic light field generation using adaptive multi-level rendering | Tseng, L.-C.; WEI-CHUNG HSU | Proceedings of the 2018 Research in Adaptive and Convergent Systems, RACS 2018 | 0 | 0 | |
19 | 2018 | Adaptive runtime exploiting sparsity in tensor of deep learning neural network on heterogeneous systems | Peng, K.-Y.; Fu, S.-Y.; Liu, Y.-P.; WEI-CHUNG HSU | Proceedings - 2017 17th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2017 | 10 | 0 | |
20 | 2017 | Dynamic translation of structured loads/stores and register mapping for architectures with SIMD extensions | Fu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; WEI-CHUNG HSU | Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES) | 4 | 0 | |
21 | 2017 | Efficient Synthetic Light Field Rendering on Heterogeneous Systems Using a Pipeline-Based Runtime Design. | Kao, Chih-Chen; Tseng, Liang-Chi; WEI-CHUNG HSU | Proceedings of the International Conference on Research in Adaptive and Convergent Systems, RACS 2017, Krakow, Poland, September 20-23, 2017 | |||
22 | 2017 | A Pipeline-Based Ray-Tracing Runtime System for HSA-Compliant Frameworks | Kao, Chih-Chen; Miao, Yu-Tsung; WEI-CHUNG HSU | Ieee Transactions on Multimedia | |||
23 | 2017 | Exploiting Asymmetric SIMD Register Configurations in ARM-to-x86 Dynamic Binary Translation | Liu, Y.-P.; Hong, D.-Y.; Wu, J.-J.; Fu, S.-Y.; WEI-CHUNG HSU | Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT | 7 | 0 | |
24 | 2017 | On static binary translation of ARM/Thumb Mixed ISA binaries | Chen, J.-Y.; Yang, W.; Hsu, W.-C.; Shen, B.-Y.; WEI-CHUNG HSU | ACM Transactions on Embedded Computing Systems | 4 | 4 | |
25 | 2017 | Exploiting longer SIMD lanes in dynamic binary translation | Hong, D.-Y.; Fu, S.-Y.; Liu, Y.-P.; Wu, J.-J.; WEI-CHUNG HSU | Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS | 7 | 0 | |
26 | 2016 | Message from the general chairs | Hsu, W.C.; CHIA-LIN YANG ; WEI-CHUNG HSU | Proceedings of the Annual International Symposium on Microarchitecture, MICRO | 0 | 0 | |
27 | 2016 | A pipeline-based runtime technique for improving Ray-Tracing on HSA-compliant systems | Kao, C.-C.; Miao, Y.-T.; WEI-CHUNG HSU | Proceedings - IEEE International Conference on Multimedia and Expo | 3 | 0 | |
28 | 2016 | SIMD code translation in an enhanced HQEMU | Fu, S.-Y.; Hong, D.-Y.; Wu, J.-J.; Liu, P.; WEI-CHUNG HSU ; PANGFENG LIU | International Conference on Parallel and Distributed Systems | 8 | 0 | |
29 | 2016 | Building a KVM-based Hypervisor for a Heterogeneous System Architecture Compliant System | Huang, Yu-Ju; Wu, Hsuan-Heng; Chung, Yeh-Ching; WEI-CHUNG HSU | Acm Sigplan Notices | |||
30 | 2016 | HSAemu 2.0: Full system emulation for HSA platforms with Soft-MMU | Hsu, H.-C.; Yeh, C.-W.; Hung, S.-H.; Hsu, W.-C.; King, C.-T.; SHIH-HAO HUNG ; WEI-CHUNG HSU | Proceedings of the 2016 Research in Adaptive and Convergent Systems, RACS 2016 | 1 | 0 | |
31 | 2016 | HSA Simulators | Chung, Y.-C.; Hsu, W.-C. ; Hung, S.-H. ; Jablin, T.B.; Kaeli, D.; Sun, Y.; Ubal, R. | Heterogeneous System Architecture: A New Compute Platform Infrastructure | 2 | 0 | |
32 | 2016 | Building a KVM-based Hypervisor for a Heterogeneous System Architecture Compliant System. | Huang, Yu-Ju; Wu, Hsuan-Heng; Chung, Yeh-Ching; WEI-CHUNG HSU | Proceedings of the 12th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, Atlanta, GA, USA, April 2-3, 2016 | 8 | 0 | |
33 | 2015 | Automatic validation for binary translation | Chen, J.-Y.; Yang, W.; Shen, B.-Y.; Li, Y.-J.; WEI-CHUNG HSU | Computer Languages, Systems and Structures | 6 | 4 | |
34 | 2015 | Runtime techniques for efficient Ray-Tracing on heterogeneous systems. | Kao, Chih-Chen; WEI-CHUNG HSU | 2015 IEEE International Conference on Digital Signal Processing, DSP 2015, Singapore, July 21-24, 2015 | 4 | 0 | |
35 | 2015 | An adaptive heterogeneous runtime framework for irregular applications | Kao, C.-C.; WEI-CHUNG HSU | Journal of Signal Processing Systems | |||
36 | 2015 | A dynamic binary translation system in a client/server environment | Hsu, C.-C.; Hong, D.-Y.; Wu, J.-J.; WEI-CHUNG HSU ; PANGFENG LIU | Journal of Systems Architecture | |||
37 | 2015 | Improving SIMD code generation in QEMU | Fu, S.-Y.; Wu, J.-J.; WEI-CHUNG HSU | Design, Automation and Test in Europe | |||
38 | 2015 | Optimizing control transfer and memory virtualization in full system emulators | Hong, D.-Y.; Hsu, C.-C.; Chou, C.-Y.; Hsu, W.-C.; Liu, P.; WEI-CHUNG HSU ; PANGFENG LIU | ACM Transactions on Architecture and Code Optimization | 5 | 2 | |
39 | 2015 | HSPT: Practical Implementation and Efficient Management of Embedded Shadow Page Tables for Cross-ISA System Virtual Machines. | Wang, Zhe; Li, Jianjun; Wu, Chenggang; Yang, Dongyan; Wang, Zhenjiang; Hsu, Wei-Chung; Li, Bin; WEI-CHUNG HSU | Proceedings of the 11th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, Istanbul, Turkey, March 14-15, 2015 | 3 | 0 | |
40 | 2014 | DBILL: an efficient and retargetable dynamic binary instrumentation framework using llvm backend. | Lyu, Yi-Hong; Hong, Ding-Yong; Wu, Tai-Yi; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; WEI-CHUNG HSU ; PANGFENG LIU | 10th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, VEE '14, Salt Lake City, UT, USA, March 01 - 02, 2014 | 14 | 0 | |
41 | 2014 | Code scheduling and register allocation in large basic blocks | Goodman, J.R.; WEI-CHUNG HSU | International Conference on Supercomputing | |||
42 | 2014 | An adaptive heterogeneous runtime for irregular applications in the case of ray-tracing (extended abstract) | Kao, C.-C.; WEI-CHUNG HSU | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | |||
43 | 2014 | An Adaptive Heterogeneous Runtime for Irregular Applications in the Case of Ray-Tracing (Extended Abstract). | Kao, Chih-Chen; WEI-CHUNG HSU | Network and Parallel Computing - 11th IFIP WG 10.3 International Conference, NPC 2014, Ilan, Taiwan, September 18-20, 2014. Proceedings | |||
44 | 2014 | Extended instruction exploration for multiple-issue architectures | Wu, I.-W.; Shann, J.J.-J.; Hsu, W.-C.; Chung, C.-P.; WEI-CHUNG HSU | ACM Transactions on Embedded Computing Systems | |||
45 | 2014 | Dynamic and adaptive calling context encoding | Li, J.; Wang, Z.; Wu, C.; Hsu, W.-C.; Xu, D.; WEI-CHUNG HSU | 12th ACM/IEEE International Symposium on Code Generation and Optimization, CGO 2014 | |||
46 | 2014 | Efficient and retargetable dynamic binary translation on multicores | Hong, D.-Y.; Wu, J.-J.; Yew, P.-C.; Hsu, W.-C.; Hsu, C.-C.; Liu, P.; Wang, C.-M.; WEI-CHUNG HSU ; PANGFENG LIU | IEEE Transactions on Parallel and Distributed Systems | 9 | 7 | |
47 | 2014 | Author retrospective for code scheduling and register allocation in large basic blocks. | Goodman, James R.; WEI-CHUNG HSU | ACM International Conference on Supercomputing 25th Anniversary Volume | 0 | 0 | |
48 | 2014 | Efficient memory virtualization for Cross-ISA system mode emulation. | Chang, Chao-Rui; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; WEI-CHUNG HSU ; PANGFENG LIU | 10th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, VEE '14, Salt Lake City, UT, USA, March 01 - 02, 2014 | 20 | 0 | |
49 | 2014 | A retargetable static binary translator for the ARM architecture | Shen, B.-Y.; Hsu, W.-C.; Yang, W.; WEI-CHUNG HSU | Transactions on Architecture and Code Optimization | |||
50 | 2013 | Improving dynamic binary optimization through early-exit guided code region formation. | Hsu, Chun-Chen; Liu, Pangfeng; Wu, Jan-Jan; Yew, Pen-Chung; Hong, Ding-Yong; Hsu, Wei-Chung; PANGFENG LIU ; WEI-CHUNG HSU | ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (co-located with ASPLOS 2013), VEE '13, Houston, TX, USA, March 16-17, 2013 | 11 | 0 | |
51 | 2013 | Long-term follow-up results in patients with classic infantile Pompe disease receiving enzyme therapy since newborn | Chien, Yin-Hsiu; Hwu, Wuh-Liang; Lee, Ni-Chung; Chen, Chun-An; Tsai, Fuu-Jen; Tsai, Wen-Hui; Huang, Hsiang-Ju; Hsu, Wei-Chung; Tsai, Tzu-Hsun; Shieh, Jeng-Yi; WEI-CHUNG HSU | Molecular Genetics and Metabolism | |||
52 | 2013 | The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread execution | Luo, Y.; Hsu, W.-C.; Zhai, A.; WEI-CHUNG HSU | Transactions on Architecture and Code Optimization | |||
53 | 2013 | Effective code discovery for ARM/Thumb mixed ISA binaries in a static binary translator | Chen, J.-Y.; Shen, B.-Y.; Ou, Q.-H.; Yang, W.; WEI-CHUNG HSU | 2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems | 11 | 0 | |
54 | 2013 | Improving Dynamic Binary Optimization Through Early-Exit Guided Code Region Formation | Hsu, Chun-Chen; Liu, Pangfeng; Wu, Jan-Jan; Yew, Pen-Chung; Hong, Ding-Yong; Hsu, Wei-Chung; WEI-CHUNG HSU ; PANGFENG LIU | Acm Sigplan Notices | 1 | 7 | |
55 | 2012 | A hybrid just-in-time compiler for android: Comparing JIT types and the result of cooperation | P\\'erez, G.A.; Kao, C.-M.; Chung, Y.-C.; WEI-CHUNG HSU | 2012 ACM International Conference on Compilers, Architectures and Synthesis for Embedded Systems | 6 | 0 | |
56 | 2012 | HQEMU: a multi-threaded and retargetable dynamic binary translator on multicores. | Hong, Ding-Yong; Hsu, Chun-Chen; Yew, Pen-Chung; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; Wang, Chien-Min; WEI-CHUNG HSU ; PANGFENG LIU | 10th Annual IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2012, San Jose, CA, USA, March 31 - April 04, 2012 | 93 | 0 | |
57 | 2012 | An LLVM-based hybrid binary translation system | Shen, B.-Y.; You, J.-Y.; Yang, W.; WEI-CHUNG HSU | 7th IEEE International Symposium on Industrial Embedded Systems | 14 | 0 | |
58 | 2012 | Design of communication interface and control system for intelligent humanoid robot. | Lin, Hsiung-Cheng; Chen, Chao-Hung; Huang, Guo-Shing; Liu, Ying-Chu; WEI-CHUNG HSU | Comp. Applic. in Engineering Education | |||
59 | 2012 | LLBT: An LLVM-based static binary translator | Shen, B.-Y.; Chen, J.-Y.; Hsu, W.-C.; WEI-CHUNG HSU | 2012 ACM International Conference on Compilers, Architectures and Synthesis for Embedded Systems | 31 | 0 | |
60 | 2011 | LnQ: Building high performance dynamic binary translators with existing compiler backends | Hsu, C.-C.; Liu, P.; Wang, C.-M.; Wu, J.-J.; Hong, D.-Y.; Yew, P.-C.; WEI-CHUNG HSU ; PANGFENG LIU | International Conference on Parallel Processing | 13 | 0 | |
61 | 2011 | Efficient and effective misaligned data access handling in a dynamic binary translation system | Li, J.; Wu, C.; WEI-CHUNG HSU | Transactions on Architecture and Code Optimization | |||
62 | 2011 | A method-based ahead-of-time compiler for android applications | Wang, C.-S.; Hsu, W.-C.; Perez, G.A.; Shih, W.-K.; Chung, Y.-C.; WEI-CHUNG HSU | 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems | 16 | 0 | |
63 | 2011 | PQEMU: A parallel system emulator based on QEMU | Ding, J.-H.; Chang, P.-C.; Hsu, W.-C.; WEI-CHUNG HSU | International Conference on Parallel and Distributed Systems | 38 | 0 | |
64 | 2011 | Dynamic register promotion of stack variables. | Li, Jianjun; Wu, Chenggang; WEI-CHUNG HSU | Proceedings of the CGO 2011, The 9th International Symposium on Code Generation and Optimization, Chamonix, France, April 2-6, 2011 | 6 | 0 | |
65 | 2010 | Performance characterization of data mining benchmarks | Mekkat, V.; Natarajan, R.; Zhai, A.; WEI-CHUNG HSU | Proceedings - Annual Workshop on Interaction between Compilers and Computer Architectures, INTERACT | 4 | 0 | |
66 | 2010 | Local-loop based robot action control module using independent microprocessors. | Chen, Chao-Hung; Lin, Hsiung-Cheng; Liu, Ying-Chu; WEI-CHUNG HSU | Comp. Applic. in Engineering Education | |||
67 | 2010 | A lock-free cache-friendly software queue buffer for decoupled software pipelining | Chen, W.R.; Yang, W.; WEI-CHUNG HSU | International Computer Symposium | |||
68 | 2010 | Energy efficient speculative threads: Dynamic thread allocation in same-ISA heterogeneous multicore systems | Luo, Y.; Packirisamy, V.; Hsu, W.-C.; WEI-CHUNG HSU | Parallel Architectures and Compilation Techniques | 19 | 0 | |
69 | 2009 | Reducing code size by graph coloring register allocation and assignment algorithm for mixed-width ISA processor | Wang, J.-S.; Wu, I-W.; Chen, Y.-S.; Shann, J.J.-J.; WEI-CHUNG HSU | 12th IEEE International Conference on Computational Science and Engineering | 0 | 0 | |
70 | 2009 | An Evaluation of Misaligned Data Access Handling Mechanisms in Dynamic Binary Translation Systems. | Li, Jianjun; Wu, Chenggang; WEI-CHUNG HSU | Proceedings of the CGO 2009, The Seventh International Symposium on Code Generation and Optimization, Seattle, Washington, USA, March 22-25, 2009 | 4 | 0 | |
71 | 2009 | Comparison of surgery or radiotherapy on complications and quality of life in patients with the stage IB and IIA uterine cervical cancer | WEI-CHUNG HSU ; Chung, Na-Na; Chen, Yu-Chia; Ting, Lai-Lei; Wang, Po-Ming; Hsieh, Pao-Chun; Chan, Shu-Ching | Gynecologic Oncology | |||
72 | 2009 | Dynamic performance tuning for speculative threads. | Luo, Yangchun; Packirisamy, Venkatesan; Hsu, Wei-Chung; Zhai, Antonia; Mungre, Nikhil; WEI-CHUNG HSU | 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA | 26 | 0 | |
73 | 2008 | Sufficient sunlight supply for home care using local closed-loop shutter control system. | Chen, Chao-Hung; Lin, Hsiung-Cheng; Liu, Ying-Chu; Hsu, Wei-Chung; Chang, Shin-Ming; WEI-CHUNG HSU | Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, Singapore, 12-15 October 2008 | |||
74 | 2008 | The EXIT (ex utero intrapartum treatment) procedure | Chiu, Hsin-Hui; JIN-CHUNG SHIH ; PO-NIEN TSAO ; WU-SHIUN HSIEH ; HUNG-CHIEH CHOU ; WEI-CHUNG HSU | Journal of the Formosan Medical Association | 13 | 10 | |
75 | 2007 | An Architecture for the Interoperability of Multimedia Messaging Services between GPRS and PHS Cellular Networks. | Hsieh, Wen-Chuan; Hsu, Wei-Chung; Hsu, Yu-Yuan; WEI-CHUNG HSU | 3rd International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2007), Kaohsiung, Taiwan, 26-28 November 2007, Proceedings | |||
76 | 2007 | Entropy-Based Profile Characterization and Classification for Automatic Profile Management. | Kim, Jinpyo; Hsu, Wei-Chung; Yew, Pen-Chung; Nair, Sreekumar R.; Geva, Robert Y.; WEI-CHUNG HSU | Advances in Computer Systems Architecture, 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings | |||
77 | 2007 | CIM: A Reliable Metric for Evaluating Program Phase Classifications. | Kodakara, Sreekumar V.; Kim, Jinpyo; Lilja, David J.; Hawkins, Douglas M.; Hsu, Wei-Chung; Yew, Pen-Chung; WEI-CHUNG HSU | Computer Architecture Letters | |||
78 | 2007 | Entropy-based profile characterization and classification for automatic profile management | Kim, J.; Hsu, W.-C.; Yew, P.-C.; Nair, S.R.; Geva, R.Y.; WEI-CHUNG HSU | Lecture Notes in Computer Science | |||
79 | 2007 | COBRA: An Adaptive Runtime Binary Optimization Framework for Multithreaded Applications. | Kim, Jinpyo; Hsu, Wei-Chung; WEI-CHUNG HSU | 2007 International Conference on Parallel Processing (ICPP 2007), September 10-14, 2007, Xi-An, China | 8 | 0 | |
80 | 2007 | Analysis of Statistical Sampling in Microarchitecture Simulation: Metric, Methodology and Program Characterization. | Kodakara, Sreekumar V.; Kim, Jinpyo; Lilja, David J.; Hsu, Wei-Chung; WEI-CHUNG HSU | IEEE 10th International Symposium on Workload Characterization, IISWC 2007, Boston, MA, USA, 27-29 September, 2007 | 1 | 0 | |
81 | 2006 | Recovery code generation for general speculative optimizations. | Lin, Jin; Hsu, Wei-Chung; Yew, Pen-Chung; Ju, Roy Dz-Ching; Ngai, Tin-Fook; WEI-CHUNG HSU | TACO | |||
82 | 2006 | Supporting Speculative Multithreading on Simultaneous Multithreaded Processors. | Packirisamy, Venkatesan; Wang, Shengyue; Zhai, Antonia; Hsu, Wei-Chung; Yew, Pen-Chung; WEI-CHUNG HSU | High Performance Computing - HiPC 2006, 13th International Conference, Bangalore, India, December 18-21, 2006, Proceedings | |||
83 | 2006 | A study of the performance potential for dynamic instruction hints selection | Fu, R.; Lu, J.; Zhai, A.; WEI-CHUNG HSU | Lecture Notes in Computer Science | |||
84 | 2006 | A Study of the Performance Potential for Dynamic Instruction Hints Selection. | Fu, Rao; Lu, Jiwei; Zhai, Antonia; WEI-CHUNG HSU | Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings | |||
85 | 2006 | Issues and support for dynamic register allocation | Das, A.; Fu, R.; Zhai, A.; WEI-CHUNG HSU | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | 1 | ||
86 | 2006 | Region monitoring for local phase detection in dynamic optimization systems | Das, A.; Lu, J.; WEI-CHUNG HSU | The 4th International Symposium on Code Generation and Optimization | 6 | 0 | |
87 | 2005 | A general compiler framework for speculative optimizations using data speculative code motion | Dai, X.; Zhai, A.; Hsu, W.-C.; Yew, P.-C.; WEI-CHUNG HSU | 2005 International Symposium on Code Generation and Optimization, CGO 2005 | |||
88 | 2005 | Dynamic Code Region (DCR) based program phase tracking and prediction for dynamic optimizations | Kim, J.; Kodakara, S.V.; Hsu, W.-C.; Lilja, D.J.; Yew, P.-C.; WEI-CHUNG HSU | Lecture Notes in Computer Science | |||
89 | 2005 | An empirical study on the granularity of pointer analysis in C programs | Chen, T.; Lin, J.; Hsu, W.-C.; Yew, P.-C.; WEI-CHUNG HSU | Lecture Notes in Computer Science | |||
90 | 2005 | A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion. | Dai, Xiaoru; Zhai, Antonia; Hsu, Wei-Chung; Yew, Pen-Chung; WEI-CHUNG HSU | 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 20-23 March 2005, San Jose, CA, USA | |||
91 | 2005 | Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor. | Lu, Jiwei; Das, Abhinav; Hsu, Wei-Chung; Nguyen, Khoa; WEI-CHUNG HSU | 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain | 82 | 0 | |
92 | 2005 | Performance of runtime optimization on BLAST | Das, A.; Lu, J.; Chen, H.; Kim, J.; Yew, P.-C.; Hsu, W.-C.; WEI-CHUNG HSU | 2005 International Symposium on Code Generation and Optimization | 6 | 0 | |
93 | 2004 | A compiler framework for recovery code generation in general speculative optimizations | Lin, J.; Hsu, W.-C.; Yew, P.-C.; Ju, R.D.-C.; Ngai, T.-F.; WEI-CHUNG HSU | Parallel Architectures and Compilation Techniques | |||
94 | 2004 | A Compiler Framework for Recovery Code Generation in General Speculative Optimizations. | Lin, Jin; Hsu, Wei-Chung; Yew, Pen-Chung; Ju, Roy Dz-Ching; Ngai, Tin-Fook; WEI-CHUNG HSU | 13th International Conference on Parallel Architectures and Compilation Techniques (PACT 2004), 29 September - 3 October 2004, Antibes Juan-les-Pins, France | |||
95 | 2004 | Data dependence profiling for speculative optimizations | Chen, T.; Lin, J.; Dai, X.; Hsu, W.-C.; Yew, P.-C.; WEI-CHUNG HSU | Lecture Notes in Computer Science | |||
96 | 2004 | Data Dependence Profiling for Speculative Optimizations. | Chen, Tong; Lin, Jin; Dai, Xiaoru; Hsu, Wei-Chung; Yew, Pen-Chung; WEI-CHUNG HSU | Compiler Construction, 13th International Conference, CC 2004, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2004, Barcelona, Spain, March 29 - April 2, 2004, Proceedings | |||
97 | 2004 | A compiler framework for speculative optimizations. | Lin, Jin; Chen, Tong; Hsu, Wei-Chung; Yew, Pen-Chung; Ju, Roy Dz-Ching; Ngai, Tin-Fook; Chan, Sun; WEI-CHUNG HSU | TACO | |||
98 | 2004 | Design and implementation of a lightweight dynamic optimization system | Lu, J.; Chen, H.; Yew, P.-C.; WEI-CHUNG HSU | Journal of Instruction-Level Parallelism | |||
99 | 2004 | Continuous adaptive object-code re-optimization framework | Chen, H.; Lu, J.; Yew, P.-C.; WEI-CHUNG HSU | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | 16 | 0 | |
100 | 2003 | A compiler framework for speculative analysis and optimizations | Lin, J.; Chen, T.; Hsu, W.-C.; Yew, P.-C.; Ju, R.D.-C.; Ngai, T.-F.; Chan, S.; WEI-CHUNG HSU | ACM SIGPLAN Notices | |||
101 | 2003 | A compiler framework for speculative analysis and optimizations. | Lin, Jin; Chen, Tong; Hsu, Wei-Chung; Yew, Pen-Chung; Ju, Roy Dz-Ching; Ngai, Tin-Fook; Chan, Sun; WEI-CHUNG HSU | Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation 2003, San Diego, California, USA, June 9-11, 2003 | |||
102 | 2003 | Dynamic Trace Selection Using Performance Monitoring Hardware Sampling. | Chen, Howard; Hsu, Wei-Chung; Chen, Dong-yuan; WEI-CHUNG HSU | 1st IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2003), 23-26 March 2003, San Francisco, CA, USA | |||
103 | 2003 | The performance of runtime data cache prefetching in a dynamic optimization system | Lu, J.; Chen, H.; Fu, R.; Hsu, W.-C.; Othmer, B.; Yew, P.-C.; WEI-CHUNG HSU | Annual International Symposium on Microarchitecture | 61 | 0 | |
104 | 2003 | Speculative register promotion using advanced load address table (ALAT) | Lin, J.; Chen, T.; Hsu, W.-C.; WEI-CHUNG HSU | International Symposium on Code Generation and Optimization | 28 | 0 | |
105 | 2002 | On the impact of naming methods for heap-oriented pointers in C programs | Chen, T.; Lin, J.; Hsu, W.-C.; WEI-CHUNG HSU | International Symposium on Parallel Architectures, Algorithms and Networks | 2 | 0 | |
106 | 2002 | An Empirical Study on the Granularity of Pointer Analysis in C Programs. | Chen, Tong; Lin, Jin; Hsu, Wei-Chung; Yew, Pen-Chung; WEI-CHUNG HSU | Languages and Compilers for Parallel Computing, 15th Workshop, LCPC 2002, College Park, MD, USA, July 25-27, 2002, Revised Papers | |||
107 | 2002 | On the Predictability of Program Behavior Using Different Input Data Sets. | WEI-CHUNG HSU ; Chen, Howard; Yew, Pen-Chung; Chen, Dong-yuan | 6th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-6 2002), 3 February 2002, Boston, MA, USA | |||
108 | 1998 | A performance study of instruction cache prefetching methods | WEI-CHUNG HSU ; Smith, J.E. | IEEE Transactions on Computers | |||
109 | 1997 | Data Prefetching on the HP PA-8000. | Santhanam, Vatsa; Gornish, Edward H.; WEI-CHUNG HSU | Proceedings of the 24th International Symposium on Computer Architecture, Denver, Colorado, USA, June 2-4, 1997 | |||
110 | 1997 | Data prefetching on the HP PA-8000 | Santhanam, Vatsa; Gornish, Edward H.; WEI-CHUNG HSU | Annual International Symposium on Computer Architecture | |||
111 | 1996 | Instruction Scheduling for the HP PA-8000. | Dunn, David A.; WEI-CHUNG HSU | Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 1996 | |||
112 | 1996 | Instruction scheduling for the HP PA-8000 | Dunn, David A.; WEI-CHUNG HSU | Annual International Symposium on Microarchitecture | |||
113 | 1993 | Toward Effective Scalar Hardware for Highly Vectorizable Applications | Vajapeyam, S.; WEI-CHUNG HSU | Journal of Parallel and Distributed Computing | |||
114 | 1993 | Performance of cached DRAM organizations in vector supercomputers | WEI-CHUNG HSU ; Smith, J.E. | Annual Symposium on Computer Architecture | |||
115 | 1993 | Performance of Cached DRAM Organizations in Vector Supercomputers. | WEI-CHUNG HSU ; Smith, James E. | Proceedings of the 20th Annual International Symposium on Computer Architecture, San Diego, CA, USA, May 1993 | |||
116 | 1992 | On the instruction-level characteristics of scalar code in highly-vectorized scientific applications | Vajapeyam, Sriram; WEI-CHUNG HSU | 25th Annual International Symposium on Microarchitecture | 1 | 0 | |
117 | 1992 | Prefetching in Supercomputer Instruction Caches. | Smith, James E.; WEI-CHUNG HSU | Proceedings Supercomputing '92, Minneapolis, MN, USA, November 16-20, 1992 | |||
118 | 1991 | An empirical study of the CRAY Y-MP processor using the PERFECT club benchmarks | Vajapeyam, Sriram; Sohi, Gurindar S.; WEI-CHUNG HSU | Conference Proceedings - Annual Symposium on Computer Architecture | 7 | 0 | |
119 | 1990 | Future general purpose supercomputer architectures. | Smith, James E.; Hsu, Wei-Chung; Hsiung, Christopher C.; WEI-CHUNG HSU | Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990 | |||
120 | 1990 | Exploitation of operation-level parallelism in a processor of the CRAY X-MP | Vajapeyam, Sriram; Sohi, Gurindar S.; WEI-CHUNG HSU | IEEE International Conference on Computer Design: VLSI in Computers and Processors | |||
121 | 1990 | The use of intermediate memories for low-latency memory access in supercomputer scalar units | Sohi, G.S.; WEI-CHUNG HSU | The Journal of Supercomputing | |||
122 | 1990 | Future general purpose supercomputer architectures | Smith, J.E.; Hsu, W.-C.; Hsiung, C.; WEI-CHUNG HSU | ||||
123 | 1990 | Exploitation of operation-level parallelism in a processor of the CRAY X-MP. | Vajapeyam, Sriram; Sohi, Gurindar S.; WEI-CHUNG HSU | Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 1990, Cambridge, MA, USA, 17-19 September, 1990 | |||
124 | 1989 | On the Minimization of Loads/Stores in Local Register Allocation | WEI-CHUNG HSU ; Fischer, C.N. | IEEE Transactions on Software Engineering | |||
125 | 1988 | Code scheduling and register allocation in large basic blocks. | Goodman, James R.; WEI-CHUNG HSU | Proceedings of the International Conference on Supercomputing | 135 | 0 | |
126 | 1987 | WISQ: A Restartable Architecture Using Queues. | Pleszkun, Andrew R.; Goodman, James R.; Hsu, Wei-Chung; Joersz, R. T.; Bier, George E.; Woest, Philip J.; Schechter, P. B.; WEI-CHUNG HSU | Proceedings of the 14th Annual International Symposium on Computer Architecture. Pittsburgh, PA, USA, June 1987 | |||
127 | 1987 | WISQ: A RESTARTABLE ARCHITECTURE USING QUEUES. | Pleszkun, A.R.; Goodman, J.R.; Hsu, W-C; Joersz, R.T.; Bier, G.; Woest, P.; Schechter, P.B.; WEI-CHUNG HSU | Annual Symposium on Computer Architecture | |||
128 | 1986 | ON THE USE OF REGISTERS VS. CACHE TO MINIMIZE MEMORY TRAFFIC. | Goodman, James R.; WEI-CHUNG HSU | Annual Symposium on Computer Architecture |