https://scholars.lib.ntu.edu.tw/handle/123456789/147656
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor | National Taiwan University Dept Elect Engn | en |
dc.contributor.author | Tsai, Jeng-Liang | en |
dc.contributor.author | Chen, Charlie Chung-Ping | en |
dc.contributor.author | Chen, Guoqiang | en |
dc.contributor.author | Goplen, Brent | en |
dc.contributor.author | Qian, Haifeng | en |
dc.contributor.author | Zhan, Yong | en |
dc.contributor.author | Kang, Steve Sung-M | en |
dc.contributor.author | Wong, Martin D.F. | en |
dc.contributor.author | Sapatnekar, Sachin S. | en |
dc.creator | Tsai, Jeng-Liang; Chen, Charlie Chung-Ping; Chen, Guoqiang; Goplen, Brent; Qian, Haifeng; Zhan, Yong; Kang, Steve Sung-M ; Wong, Martin D.F.; Sapatnekar, Sachin S. | en |
dc.date | 2006-08 | - |
dc.date.accessioned | 2006-11-14T18:38:36Z | - |
dc.date.accessioned | 2018-07-06T09:36:08Z | - |
dc.date.available | 2006-11-14T18:38:36Z | - |
dc.date.available | 2018-07-06T09:36:08Z | - |
dc.date.issued | 2006-08 | - |
dc.identifier | 246246/200611150121559 | zh_TW |
dc.identifier.uri | http://ntur.lib.ntu.edu.tw//handle/246246/200611150121559 | - |
dc.description.abstract | Dramatic rises in the power consumption and integration density of contemporary systems-on-chip (SoCs) have led to the need for careful attention to chip-level thermal integrity. High temperatures or uneven temperature distributions may result not only in reliability issues, but also timing failures, due to the temperature-dependent nature of chip time-to-failure and delay, respectively. To resolve these issues, high-quality, accurate thermal modeling and analysis, and thermally oriented placement optimizations, are essential prior to tapeout. This paper first presents an overview of thermal modeling and simulation methods, such as finite-difference time domain, finite element, model reduction, random walk, and Green-function based algorithms, that are appropriate for use in placement algorithms. Next, two-dimensional and threedimensional thermal-aware placement algorithms such as matrix-synthesis, simulated annealing, partition-driven, and force directed are presented. Finally, future trends and challenges are described. | en |
dc.format | application/pdf | zh_TW |
dc.format.extent | 789577 bytes | - |
dc.format.mimetype | application/pdf | - |
dc.language | en-US | zh_TW |
dc.language.iso | zh_TW | - |
dc.publisher | Taipei:National Taiwan University Dept Chem Engn | en |
dc.relation | Vol. 94, No. 8, August 2006 | Proceedings of the IEEE | en |
dc.relation.ispartof | Vol. 94 | - |
dc.source | http://ieeexplore.ieee.org/ | en |
dc.subject | Physical design | en |
dc.subject | placement | en |
dc.subject | thermal analysis | en |
dc.subject | thermal simulation | en |
dc.title | Temperature-Aware Placement for SOCs | en |
dc.type | journal article | en |
dc.relation.pages | - | - |
dc.relation.journalissue | No. 8 | - |
dc.identifier.uri.fulltext | http://ntur.lib.ntu.edu.tw/bitstream/246246/200611150121559/1/136.pdf | - |
item.languageiso639-1 | zh_TW | - |
item.cerifentitytype | Publications | - |
item.fulltext | with fulltext | - |
item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
item.openairetype | journal article | - |
item.grantfulltext | open | - |
顯示於: | 電機工程學系 |
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