https://scholars.lib.ntu.edu.tw/handle/123456789/150175
標題: | Performance analysis and architecture evaluation of MPEG-4 video codec system | 作者: | Chang, Hao-Chieh LIANG-GEE CHEN Hsu, Mei-Yun Chang, Yung-Chi |
公開日期: | 五月-2000 | 卷: | 2 | 起(迄)頁: | II-449-II-452 | 來源出版物: | Proceedings - IEEE International Symposium on Circuits and Systems | 會議論文: | Proceedings of the IEEE 2000 International Symposium on Circuits and Systems, ISCAS 2000 | 摘要: | This paper presents various analyses of computational behavior, namely the number of datapath operations and memory access, on the core profile level 2 (CPL2) of MPEG-4 Video standard. These analyzed data exploit the load distribution and mode selection of the video system. The exploration of data-flow behavior and its derived computation of MPGE-4 video processing algorithms will then drive through an efficient architecture design. |
URI: | http://ntur.lib.ntu.edu.tw//handle/246246/2007041910021468 https://www.scopus.com/inward/record.uri?eid=2-s2.0-0033699271&doi=10.1109%2fISCAS.2000.856361&partnerID=40&md5=c9369f2439b0dea3b7481e4328ffbad6 |
ISSN: | 02714310 | 其他識別: | N/A | DOI: | 10.1109/ISCAS.2000.856361 | SDG/關鍵字: | Algorithms; Computational complexity; Computer architecture; Electric network analysis; Electric network synthesis; Integrated circuit layout; Standards; Video signal processing; Motion picture experts group (MPEG) standards; Video processing algorithms; Digital integrated circuits |
顯示於: | 電機工程學系 |
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00856361.pdf | 459.48 kB | Adobe PDF | 檢視/開啟 |
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