https://scholars.lib.ntu.edu.tw/handle/123456789/150533
標題: | Analogue adaptive neural network circuit | 作者: | Chiang, M.L. Lu, T.C. JAMES-B KUO |
關鍵字: | Control systems, Adaptive; Integrated circuits, VLSI; Semiconductor devices, MOS; Transistors, Field effect; Adaptive neural networks; Analog neural networks; Hopfield networks; MOS transistors; One-transistor circuits; Neural networks | 公開日期: | 十二月-1991 | 起(迄)頁: | - | 來源出版物: | Circuits, Devices and Systems, IEE Proceedings G | 摘要: | Current integrated circuits realising neural networks take up too much area for implementing synapses. The paper presents a one-transistor (1T) synapse circuit that uses a single MOS transistor, which is more efficient for VLSI implementation of adaptive neural networks, compared to other synapse circuits. This 1T synapse circuit can be used to implement multiply/divide/sum circuits to realise an adaptive neural network. The feasibility of using this circuit in adaptive neural networks is demonstrated by a 4-bit analogue-to-digital converter circuit, based on the Hopfield modified neural network model, with an analogue LMS adaptive feedback. DC and transient studies show that 1T synapse circuits with an analogue adaptive feedback circuit can be used more efficiently for VLSI implementation of adaptive neural networks. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-0026366981&doi=10.1049%2fip-g-2.1991.0117&partnerID=40&md5=0e9c5313411a1b406db3753ab86e27a7 | ISSN: | N/A | 其他識別: | 0956-3768 | DOI: | 10.1049/ip-g-2.1991.0117 |
顯示於: | 電機工程學系 |
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