https://scholars.lib.ntu.edu.tw/handle/123456789/155573
標題: | Analytical and T-CAD modeling of pentacene thin-film transistors | 作者: | Chen, Yet-Min Chen, Yu-Sheng JIAN-JANG HUANG JIUN-HAW LEE Wang, Yu-Wu Wang, Yi-Kai |
關鍵字: | Many researches report that the mobility in organic material is dependent on not only the gate field but also the grain size. There is also some evidence to prove that the gate length is strongly related to the carrier mobility. We construct both the analytical model of organic thin film transistor and the large signal circuit model designed by T-CAD to fit the measured IDS - VDS curves. We first apply basic IDS - VDS equations in both triode and saturation regions with mobility μ best fitted to measured I-V curves. The "best-fitted" μ increases with the gate length, and is related to the increase of total channel resistance due to the presence of small grains size of pentacene next to source/drain electrodes. We then use the Advanced Design System software to design the large signal circuit model. Similar to the MOSFET, we add the additional parameters to fit the I DS - VDS curves, ex: Rgd, Rgs, and Rp. Here, Rgd. With the circuit simulation, we find that Rgd presents the leakage current from gate to source, and it affects the slope of curves in the saturation region in the IDS - VDS curves. The equivalent circuit can fit the IDS - VDS curves very well with the proper parameter set. Analytical model; DC model; Organic; Transistor | 公開日期: | 2006 | 卷: | 6336 | 來源出版物: | Proceedings of SPIE - The International Society for Optical Engineering | 會議論文: | Organic Field-Effect Transistors V | 摘要: | Many researches report that the mobility in organic material is dependent on not only the gate field but also the grain size. There is also some evidence to prove that the gate length is strongly related to the carrier mobility. We construct both the analytical model of organic thin film transistor and the large signal circuit model designed by T-CAD to fit the measured IDS - VDS curves. We first apply basic IDS - VDS equations in both triode and saturation regions with mobility μ best fitted to measured I-V curves. The "best-fitted" μ increases with the gate length, and is related to the increase of total channel resistance due to the presence of small grains size of pentacene next to source/drain electrodes. We then use the Advanced Design System software to design the large signal circuit model. Similar to the MOSFET, we add the additional parameters to fit the I DS - VDS curves, ex: Rgd, Rgs, and Rp. Here, Rgd. With the circuit simulation, we find that Rgd presents the leakage current from gate to source, and it affects the slope of curves in the saturation region in the IDS - VDS curves. The equivalent circuit can fit the IDS - VDS curves very well with the proper parameter set. |
URI: | http://ntur.lib.ntu.edu.tw//handle/246246/145881 https://www.scopus.com/inward/record.uri?eid=2-s2.0-33751412865&doi=10.1117%2f12.679748&partnerID=40&md5=4ed23548e23eacb126b3e7a2e74f3490 |
ISSN: | 0277786X | DOI: | 10.1117/12.679748 |
顯示於: | 電機工程學系 |
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