https://scholars.lib.ntu.edu.tw/handle/123456789/304396
標題: | Design and Analysis of Low Power Cache using Two-Level Filter Scheme | 作者: | Yen-Jen Chang FEI-PEI LAI |
關鍵字: | Block buffer; Filter scheme; Low-power cache; Power consumption; Unnecessary cache activity | 公開日期: | 八月-2003 | 卷: | 11 | 期: | 4 | 起(迄)頁: | 568-580 | 來源出版物: | IEEE Transactions on Very Large Scale Integration Systems | 摘要: | Power consumption is an increasingly pressing problem in modern processor design. Since the on-chip caches usually consume a significant amount of power, it is one of the most attractive targets for power reduction. This paper presents a two-level filter scheme, which consists of the L1 and L2 filters, to reduce the power consumption of the on-chip cache. The main idea of the proposed scheme is motivated by the substantial unnecessary activities in conventional cache architecture. We use a single block buffer as the L1 filter to eliminate the unnecessary cache accesses. In the L2 filter, we then propose a new sentry-tag architecture to further filter out the unnecessary way activities in case of the L1 filter miss. We use SimpleScalar to simulate the SPEC2000 benchmarks and perform the HSPICE simulations to evaluate the proposed architecture. Experimental results show that the two-level filter scheme can effectively reduce the cache power consumption by eliminating most unnecessary cache activities, while the compromise of system performance is negligible. Compared to a conventional instruction cache (32 kB, two-way) implemented with only the LI filter, the use of a two-level filter can result in roughly 30% reduction in total cache power consumption. Similarly, compared to a conventional data cache (32 kB, four-way) implemented with only the LI filter, the total cache power reduction is approximately 46%. |
URI: | http://scholars.lib.ntu.edu.tw/handle/123456789/304396 | DOI: | 10.1109/TVLSI.2003.812292 | SDG/關鍵字: | Buffer storage; Energy efficiency; Energy utilization; Estimation; Low-power cache; VLSI circuits |
顯示於: | 生醫電子與資訊學研究所 |
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