https://scholars.lib.ntu.edu.tw/handle/123456789/351844
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | G.-H. Shiue | en_US |
dc.contributor.author | RUEY-BEEI WU | - |
dc.creator | G.-H. Shiue;R.-B. Wu | - |
dc.date.accessioned | 2018-09-10T07:41:20Z | - |
dc.date.available | 2018-09-10T07:41:20Z | - |
dc.date.issued | 2009-08 | - |
dc.identifier.issn | 15213323 | - |
dc.identifier.uri | http://scholars.lib.ntu.edu.tw/handle/123456789/351844 | - |
dc.identifier.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-68949196321&doi=10.1109%2fTADVP.2009.2018830&partnerID=40&md5=60a787be260111e665f83918f6c92fc3 | - |
dc.description.abstract | This paper investigates the noise reduction in the slot-induced ground bounce noise by using differential signaling. An efficient 2-D finite-difference time-domain method together with equivalent circuits for both the differential line and the slot is established and simulations are performed for a three-layer structure to characterize the ground bounce coupling. A simple model is then proposed to understand how the differential coupled microstrip lines can help reduce ground bounce. Different factors which affect noise reduction are investigated, such as the coupling coefficient, rising time, skew of differential signaling, and structure asymmetry in slotline. An experimental setup is devised to demonstrate the noise coupling between signal lines due to the slot-induced ground bounce and significant noise reduction by employing differential signaling. A favorable comparison between the simulation and measured results validates the proposed equivalent circuit model and analysis approach. © 2009 IEEE. | - |
dc.language | en | en |
dc.relation.ispartof | IEEE Transactions on Advanced Packaging | en_US |
dc.source | AH-anncc | - |
dc.subject | Coupling coefficient; Delay skew; Differential signaling; Finite-difference time-domain (FDTD); Ground bounce; Signal integrity; Slew rate skew; Slot | - |
dc.subject.other | Coupling coefficient; Delay skew; Differential signaling; Finite-difference time-domain (FDTD); Ground bounce; Signal integrity; Slew rate skew; Slot; Acoustic noise measurement; Electric network analysis; Finite difference time domain method; Method of moments; Microstrip devices; Microstrip lines; Reverberation; Signaling; Simulators; Equivalent circuits | - |
dc.title | Reduction in Reflections and Ground Bounce for Signal Line Over Slotted Power Plane Using Differential Coupled Microstrip Lines | - |
dc.type | journal article | en |
dc.identifier.doi | 10.1109/TADVP.2009.2018830 | - |
dc.identifier.scopus | 2-s2.0-68949196321 | - |
dc.identifier.isi | WOS:000268757000001 | - |
dc.relation.pages | 581-588 | - |
dc.relation.journalvolume | 32 | - |
dc.relation.journalissue | 3 | - |
item.openairetype | journal article | - |
item.cerifentitytype | Publications | - |
item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
item.fulltext | no fulltext | - |
item.grantfulltext | none | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Communication Engineering | - |
crisitem.author.dept | MediaTek-NTU Research Center | - |
crisitem.author.orcid | 0000-0001-5735-2152 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | Others: University-Level Research Centers | - |
顯示於: | 電機工程學系 |
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