https://scholars.lib.ntu.edu.tw/handle/123456789/498226| Title: | A 0.5-V 1.9-GIk low-power phase-locked loop in 0.18-μm CMOS | Authors: | Hsieh, H.-H. Lu, C.-T. LIANG-HUNG LU LIANG-HUNG LU |
Issue Date: | 2007 | Start page/Pages: | 164-165 | Source: | IEEE Symposium on VLSI Circuits, Digest of Technical Papers | URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/498226 | DOI: | 10.1109/VLSIC.2007.4342699 |
| Appears in Collections: | 電機工程學系 |
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