https://scholars.lib.ntu.edu.tw/handle/123456789/499123
標題: | A wideband PLL-based G/FSK transmitter in 0.18 μm CMOS | 作者: | Liu, Y.-H. Lin, T.-H. TSUNG-HSIEN LIN |
關鍵字: | ΣΔ; Direct Digital frequency synthesis (DDFS); Flying-adder; Fractional frequency divider; Fractional-N; FSK transmitters; Multiphase PLL; Phase-locked loops (PLL); Sigma-delta | 公開日期: | 2009 | 卷: | 44 | 期: | 9 | 起(迄)頁: | 2452-2462 | 來源出版物: | IEEE Journal of Solid-State Circuits | 摘要: | A wideband phase-locked loop (PLL)-based G/FSK transmitter (TX) architecture is presented in this paper. In the proposed TX, the G/FSK data is applied outside the loop; hence, the data rate is not constrained by the PLL bandwidth. In addition, the PLL remains locked all the time, preventing the carrier frequency from drifting. In this architecture, the G/FSK modulation signal is generated from a proposed Sigma-Delta modulated Phase Rotator (ΣΔ -PR). By properly combining the multi-phase signals from the PLL output, the ΣΔ -PR effectively operates as a fractional frequency divider, which can synthesize modulation signals with fine-resolution frequencies. The proposed ΣΔ -PR adopts the input signal as the phase transition trigger, facilitating a glitch-free operation. The impact of the ΣΔ -PR on the TX output noise is also analyzed in this paper. The proposed TX with the ΣΔ -PR is digitally programmable and can generate various G/FSK signals for different applications. Fabricated in a 0.18 μ m CMOS technology, the proposed TX draws 6.3 mA from a 1.4 V supply, and delivers an output power of -11 dBm. With a maximum data rate of 6 Mb/s, the TX achieves an energy efficiency of 1.5 nJ/bit. © 2006 IEEE. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/499123 | DOI: | 10.1109/JSSC.2009.2022994 | SDG/關鍵字: | Direct Digital frequency synthesis (DDFS); Flying-adder; Fractional frequency divider; Fractional-N; FSK transmitters; Multiphase PLL; Phase-locked loops (PLL); Sigma-delta; CMOS integrated circuits; Delay circuits; Delta sigma modulation; Energy efficiency; Frequency dividing circuits; Frequency shift keying; Phase transitions; Spurious signal noise; Transmitters; Phase locked loops |
顯示於: | 電機工程學系 |
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