公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
---|---|---|---|---|---|---|
2016 | A 2X25Gb/s 20mW serializing transmitter with 2.5:1 multiplexers in 40nm technology | B-C Lin; W-S Chang; T-C Lee; TAI-CHENG LEE | IEEE VLSI-DAT | 0 | 0 | |
2016 | A 5 GHz Fractional- N ADC-Based Digital Phase-Locked Loops With ?243.8 dB FOM | W-S Chang; T-C Lee; TAI-CHENG LEE | IEEE Transactions on Circuits and Systems, Part I | |||
2017 | A 5.12-GHz Fractional-N clock multiplier with an LC-VCO-based MDLL | D-N Jhou; W-S Chang; T-C Lee; TAI-CHENG LEE | IEEE Symposium on VLSI Circuits | |||
2014 | A 2.3-GHz Fractional-N Divider-less Phase-Locked Loop with -112dBc/Hz In-Band Phase Noise | P-C Huang; W-S Chang; T-C Lee; TAI-CHENG LEE | IEEE Journal of Solid-State Circuits | |||
2014 | A 2.3-GHz Fractional-N Divider-less Phase-Locked Loop with -112dBc/Hz In-Band Phase Noise | P-C Huang; W-S Chang; T-C Lee; TAI-CHENG LEE | International Solid-State Circuit Conference | |||
2014 | A 3X-oversampling hybrid clock and data recovery circuit with programmable bandwidth | J-A Cheng; W-S Chang; T-C Lee; TAI-CHENG LEE | IEEE VLSI-DAT | 1 | 0 | |
2017 | An Energy-Efficient Self-Charged Crystal Oscillator with a Quadrature-Phase Shifter Technique | W-S Chang; D-N Jhou; Y-H Yang; T-C Lee; TAI-CHENG LEE | IEEE Asian Solid-State Circuit Conference | 2 | 0 |