A 2X25Gb/s 20mW serializing transmitter with 2.5:1 multiplexers in 40nm technology
Journal
IEEE VLSI-DAT
Pages
394-395
Date Issued
2016
Author(s)
Abstract
A low-power serializing transmitter is proposed by using a 2.5:1 multiplexer. Owing to its fractional multiplexing operation, only a single clock is needed to simplify the clock generator design as well as hardware cost. Fabricated in a 40 nm CMOS technology, the transmitter can generate 2-channel 25-Gbps signals. The transmitter consumes only 24 mW from a 0.9-V power supply.
SDGs
Type
conference paper