公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2018 | 2018 consensus of the Taiwan Society of Cardiology and the Diabetes Association of Republic of China (Taiwan) on the pharmacological management of patients with type 2 diabetes and cardiovascular diseases | Chiang, Chern-En; Lin, Shih-Yi; TSUNG-HSIEN LIN ; TZUNG-DAU WANG ; Yeh, Hung-I; Chen, Jung-Fu; CHIA-TI TSAI ; Hung, Yi-Jen; Li, Yi-Heng; Liu, Ping-Yen; Chang, Kuan-Cheng; Wang, Kang-Ling; Chao, Ting-Hsing; Shyu, Kou-Gi; WEI-SHIUNG YANG ; Ueng, Kwo-Chang; Chu, Pao-Hsien; Yin, Wei-Hsian; YEN-WEN WU ; Cheng, Hao-Min; Shin, Shyi-Jang; Huang, Chien-Ning; LEE-MING CHUANG ; Lin, Shing-Jong; Yeh, San-Jou; Sheu, Wayne Huey-Herng; JIUNN-LEE LIN | Journal of the Chinese Medical Association : JCMA | 18 | 16 | |
2021 | 29.5 A 0.008mm21.5mW 0.625-to-200MHz Fractional Output Divider with 120fsrmsJitter Based on Replica-DTC-Free Background Calibration | Lin C.-Y; Hung Y.-T; Wang T.-J; TSUNG-HSIEN LIN | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | 2 | 0 | |
2015 | A 31.2% locking range K-band divide-by-6 injection-locked frequency divider using 90 nm CMOS technology | Chan, C.-C.; Lin, T.-H.; Chang, H.-Y.; TSUNG-HSIEN LIN | 2015 IEEE MTT-S International Microwave Symposium, IMS 2015 | 6 | 0 | |
2016 | A 330-uW 400-MHz BPSK Transmitter in 0.18-um CMOS for Bio-medical Applications | Y.-L. Tsai; C.-Y. Lin; B.-C. Wang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE TCAS-II | | | |
2016 | A 330-μW 400-MHz BPSK Transmitter in 0.18-μm CMOS for Biomedical Applications | Tsai, Y.-L.; Lin, C.-Y.; Wang, B.-C.; TSUNG-HSIEN LIN | IEEE Transactions on Circuits and Systems II: Express Briefs | 23 | 20 | |
2016 | A 4-GHz Delta-Sigma Fractional-N Frequency Synthesizer with 2-Dimensional Quantization Noise Pushing and Fractional Spur Elimination Techniques | C.-Y. Lin; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE A-SSCC | | | |
2017 | A 4-GHz ΔΣ fractional-N frequency synthesizer with 2-dimensional quantization noise pushing and fractional spur elimination techniques | Lin, C.-Y.; Lin, T.-H.; TSUNG-HSIEN LIN | 2016 IEEE Asian Solid-State Circuits Conference, A-SSCC 2016 - Proceedings | 2 | 0 | |
2017 | A 40-nV/VHz 0.0145-mm2 sensor readout circuit with chopped VCO-based CTDSM in 40-nm CMOS | Tu C.-C; Wang Y.-K; Lin T.-H.; TSUNG-HSIEN LIN | 2016 IEEE Asian Solid-State Circuits Conference, A-SSCC 2016 - Proceedings | 1 | 0 | |
2016 | A 40-nV/√Hz 0.0145-mm2 Sensor Readout Circuit with Chopped VCO-based CTDSM in 40-nm CMOS | C.-C. Tu; Y.-K. Wang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE A-SSCC | 1 | 0 | |
2014 | A 400MHz 10Mbps D-BPSK Receiver with a Reference-less Dynamic Phase-to-Amplitude Demodulation Technique | Y.-L. Tsai; J.-Y. Chen; B.-C. Wang; T.-Y. Yeh; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE Symposium on VLSI Circuits | 9 | 0 | |
2015 | A 42-71 GHz 90 nm CMOS injection-locked voltage-controlled oscillator using bulk injection technique | Lin, Y.-A.; Lin, T.-H.; Chang, H.-Y.; TSUNG-HSIEN LIN | European Microwave Week 2015: | 2 | 0 | |
2003 | A 5-GHz Direct-Conversion CMOS Transceiver Utilizing Automatic Frequency Control for the IEEE 802.11a Wireless LAN Standard | Behzad, A.R.; Shi, Z.M.; Anand, S.B.; Lin, L.; Carter, K.A.; Kappes, M.S.; Lin, T.-H.; Nguyen, T.; Yuan, D.; Wu, S.; Wong, Y.C.; Fong, V.; Rofougaran, A.; TSUNG-HSIEN LIN | IEEE Journal of Solid-State Circuits | 96 | 70 | |
2010 | A 5-GHz fractional-N phase-locked loop with spur reduction technique in 0.13-μm CMOS | Chiu, W.-H.; Cheng, C.-Y.; Lin, T.-H.; TSUNG-HSIEN LIN | ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems | 1 | 0 | |
2006 | 50% Duty-Cycle Clock Generator | TSUNG-HSIEN LIN | | | | |
2014 | An 8.5MHz 67.2dB SNDR CTDSM with ELD Compensation Embedded Twin-T SAB and Circular TDC-based Quantizer in 90nm CMOS | C.-H. Weng; T.-A. Wei; E. Alpman; C.-T. Fu; Y.-T. Tseng; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE Symposium on VLSI Circuits | 16 | 0 | |
2007 | A 0.8-V 0.25-mW Current-Mirror OTA with 160-MHz GBW in 0.18-um CMOS | C.-K. Wu; M.-C. Tsai; TSUNG-HSIEN LIN | IEEE Transactions on Circuits and Systems II | 37 | 0 | |
2006 | A 0.8-V 0.25-mW Current-Mirror OTA with 160-MHz GBW in 0.18-μm CMOS | C.-K. Wu; M.-C. Tsai; T.-H. Lin; TSUNG-HSIEN LIN | VLSI Design/CAD Symposium | 37 | 21 | |
2011 | A 0.89-mW 1-MHz 62-dB SNDR Continuous-Time Delta-Sigma Modulator with an Asynchronous Sequential Quantizer and Digital Excess Loop Delay Compensation | C.-H. Weng; C.-C. Lin; Y.-C. Chang; TSUNG-HSIEN LIN | IEEE TCAS-II | 9 | 21 | |
2010 | A 1-V Low-Noise Readout Front-End for Biomedical Applications in 0.18-μm CMOS | C.-J. Chou; B.-J. Kuo; T.-H. Lin; TSUNG-HSIEN LIN | IEEE VLSI-DAT | 7 | 0 | |
2005 | A 10-GHz CMOS PLL with an Agile VCO Calibration | Y.-J. Lai; T.-H Lin; TSUNG-HSIEN LIN | IEEE Asian Solid-State Circuit Conference | 10 | 0 | |