公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
1987 | FAMI:A Fast Logic Minimizer for PLA Design | Maa, N. S.; 馮武雄; Feng, Wu-Shiung | Proceedings of | | | |
1987 | A Fault Grader | Chen, T. H.; 馮武雄; 林呈祥; Feng, Wu-Shiung; Lin, Chen-Shang | Proceedings of 1987 Electron Devices and Materials Symposium | | | |
1991 | A General-Purpose Hopfield Network Simulator | Shih, P. H.; 馮武雄; Feng, Wu-Shiung | The 9th IASTED International Symposium on Applied Informatics, Innsbruck, Austria(1991.02.18-02.21) | | | |
1990 | Generalized Terminal Connectivity Problem | Tsai, C. C.; Chen, S. J.; 馮武雄; Feng, Wu-Shiung | Computer-Aided Design | | | |
1989 | Generalized Terminal Connectivity Problem for Multi-Layer Layout Scheme | Tsai, C. C.; 馮武雄; 陳少傑 ; Hsiao, P, Y.; Chen, H. F.; Feng, Wu-Shiung; Chen, Sao-Jie | 1989 Joint Technical Conference on Circuits/Systems, Computers and Communications | | | |
1988 | A Global Approach for Via Minimization | Jyu, H. F.; 馮武雄; Feng, Wu-Shiung | Proceedings of International Computer Symposium | | | |
1989 | Graph Contractibility Problem for VLSI Layer Assignment | Chang, K. E.; 馮武雄; Feng, Wu-Shiung | Journal of the Chinese Institute of Engineers | | | |
1986 | The Growth and Characteristics of GaAs/Ge/Si Materials | Feng, Wu-Shiung | Silicon Materials Research Symposium, Hsinchu(1986.11.28) | | | |
1994 | An H-V Alternating Router | Tsai, C. C.; 陳少傑; 馮武雄; Chen, Sao-Jie; Feng, Wu-Shiung | IEEE Transactions on CAD | | | |
1991 | An H-V Tile Expansion Router | Tsai, C. C.; 陳少傑; 馮武雄; Chen, Sao-Jie; Feng, Wu-Shiung | Journal of Information Science and Engineering | | | |
1989 | An H-V Tile-Expansion Router | Tsai, C. C.; 陳少傑 ; 馮武雄; Chen, Sao-Jie ; Feng, Wu-Shiung | National Computer Symposium | | | |
2003 | Harmonic retrieval using cumulant-based estimator for ARMA systems | Shing, Tenqchen; Shu, Ying-Haw; Sun, Ming-Chang; Feng, Wu-Shiung | Information, Communications and Signal Processing, 2003 and the Fourth Pacific Rim Conference on Multimedia. Proceedings of the 2003 Joint Conference of the Fourth International Conference on | 0 | 0 | |
1989 | A Heuristic Scanning Line Approach for an Expert Layout Compactor | Hsiao, P. Y.; Chen, S. F. Steven; 馮武雄; Feng, Wu-Shiung | The IFIP VLSI'89 Conference | | | |
1987 | Hierarchical Layout System | Tsai, C. C.; Kuo, S. T.; Uang, T. C.; Wang, L. J.; Yeap, K. H.; 馮武雄; Feng, Wu-Shiung | International Symposium on VLSI Technology, Systems, and Applications, Taipei(1987.05) | | | |
1986 | Hierarchical Placement System for VLSI Design | 馮武雄; Parng, T. P.; 于惠中; Chen, C. F.; Feng, Wu-Shiung; Yu, Hui-Jung | | | | |
1986 | Hierarchical Timing Verification System for Multiple Clocked Logic Circuit | Tyan, C. Y.; 馮武雄; 于惠中; Yeh, T. S.; Feng, Wu-Shiung; Yu, Hui-Jung | 1986 Electron Devices and Materials Symposium, Tainan(1986.08) | | | |
1985 | Highly Concurrent Algorithm and Pipelined VLSI Architecture for Solving Covariance Systems | Jou, I. C.; Hu, Y. H.; 于惠中; 馮武雄; Yu, Hui-Jung; Feng, Wu-Shiung | International AMSE Conference on Modelling and Simulation Storrs, Connecticut(1985.07.01-07.03) | | | |
1986 | HILAS-an Hierarchical and Interactive Layout Editor System | 馮武雄; Parng, T. P.; 于惠中; Chen, C. F.; Feng, Wu-Shiung; Yu, Hui-Jung | | | | |
1987 | HILAS-Hierarchical Interactive Layout System | Tsai, C. C.; 馮武雄; Feng, Wu-Shiung | 1987 Electron Devices and Materials Symposium, Taipei(1987.09) | | | |
1991 | Hybrid Routing on Multi-Chip Modules | Tsai, C. C.; 陳少傑 ; Hsiao, P. Y.; 馮武雄; Chen, Sao-Jie ; Feng, Wu-Shiung | 1991 Custom Integrated Circuits Conference | | | |