公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2011 | A Parallel Test Pattern Generation Algorithm to Meet Multiple Quality Objectives | CHIEN-MO LI ; Liao, Kuan-Yu; Chang, Chia-Yuan; CHIEN-MO LI | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | | 13 | |
2013 | Automatic test pattern generation for delay defects using timed characteristic functions. | Ho, Shin-Yann; Lin, Shuo-Ren; Yuan, Ko-Lung; Kuo, Chien-Yen; Liao, Kuan-Yu; Jiang, Jie-Hong R.; CHIEN-MO LI ; JIE-HONG JIANG | The IEEE/ACM International Conference on Computer-Aided Design, ICCAD'13, San Jose, CA, USA, November 18-21, 2013 | 2 | 0 | |
2009 | BIST design optimization for large-scale embedded memory cores. | Chien, Tzuo-Fan; Chao, Wen-Chi; Li, James Chien-Mo; Chang, Yao-Wen; Liao, Kuan-Yu; Chang, Ming-Tung; Tsai, Min-Hsiu; CHIEN-MO LI ; YAO-WEN CHANG | 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009 | 7 | 0 | |
2014 | GPU-based timing-aware test generation for small delay defects. | Liao, Kuan-Yu; Chen, Po-Juei; Lin, Ang-Feng; Li, James Chien-Mo; Hsiao, Michael S.; Wang, Laung-Terng; CHIEN-MO LI | 19th IEEE European Test Symposium, ETS 2014, Paderborn, Germany, May 26-30, 2014 | | | |
2014 | 利用圖形處理器高品質測試向量產生器 | 廖官榆; Liao, Kuan-Yu | | | | |