公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2004 | B-spline factorization-based architecture for inverse discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee | International Symposium on Circuits and Systems, 2004. ISCAS '04 | | | |
2001 | CDSP: an application-specific digital signal processor for third generation wireless communications | Tseng, Po-Chih; Chen, Chi-Kuang; Chen, Liang-Gee | International Conference on Consumer Electronics, 2001 | 0 | 0 | |
2001 | A digital signal processor with programmable correlator arrayarchitecture for third generation wireless communication system | Chen, Chi-Kuang; Tseng, Po-Chih; Chang, Yung-Chil; Chen, Liang-Gee | IEEE Circuits and Systems II: Analog and Digital Signal Processing | | | |
2002 | Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, ISCAS 2002 | 0 | 0 | |
2002 | Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS | 12 | 0 | |
2004 | Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | 198 | 137 | |
2002 | Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method | Tseng, Po-Chih; Huang, Chao-Tsung; LIANG-GEE CHEN | IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS | 44 | 0 | |
2005 | Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 81 | 61 | |
2001 | H.26L intra mode encoder architecture for digital camera application | Wang, Tu-Chih; Tseng, Po-Chih; Chen, Liang-Gee | International Conference on Consumer Electronics | 0 | 0 | |
2004 | Hardware architecture design for visual processing: present and future | Tseng, Po-Chih; Chen, Liang-Gee | Advanced System Integrated Circuits 2004 | 0 | 0 | |
2003 | Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9,7) filter bank | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | International Conference on Image Processing, 2003 | 0 | 0 | |
2004 | Low-power parallel tree architecture for full search block-matching motion estimation | Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee | International Symposium on Circuits and Systems, 2004. ISCAS '04 | | | |
2004 | Memory analysis and architecture for two-dimensional discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE International Conference on Acoustics, Speech, and Signal Processing, 2004 | 0 | 0 | |
2004 | Multi-mode content-aware motion estimation algorithm for power-aware video coding systems | Lin, Siou-Shen; Tseng, Po-Chih; Lin, Chia-Ping; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, 2004. SIPS 2004 | 0 | 0 | |
2003 | Perspectives of multimedia SoC | Tseng, Po-Chih; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, SIPS 2003 | | | |
2004 | Reconfigurable discrete cosine transform processor for object-based video signal processing | Tseng, Po-Chih; Haung, Chao-Tsung; Chen, Liang-Gee | IEEE International Symposium on Circuits and Systems, 2004. ISCAS '04 | | | |
2003 | Reconfigurable discrete wavelet transform architecture for advanced multimedia systems | Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, SIPS 2003. | | | |
2005 | Reconfigurable discrete wavelet transform processor for heterogeneous reconfigurable multimedia systems | Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee | The Journal of | | | |
2003 | VLSI architecture for discrete wavelet transform based on B-spline factorization | Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, SIPS 2003 | | | |
2005 | VLSI architecture for forward discrete wavelet transform based on B-spline factorization | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 14 | 11 | |