公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2007 | A clock-fault tolerant architecture and circuit for reliable nanoelectronics system | AN-YEU(ANDY) WU ; Ang, W.T.; Rao, H.F.; Yu, C.; Liu, J.; Wey, I.-C.; Wu, A.-Y.; Zhao, H.; Chen, J.; AN-YEU(ANDY) WU | 2007 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2007 | | | |
2008 | An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on Belief Propagation | AN-YEU(ANDY) WU ; Rao, H.; Chen, J.; Zhao, V.H.; Ang, W.T.; Wey, I.-C.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | | | |
2007 | Ensemble dependent matrix methodology for probabilistic-based fault-tolerant nanoscale circuit design | AN-YEU(ANDY) WU ; Rao, H.; Chen, J.; Yu, C.; Ang, W.T.; Wey, I.-C.; Wu, A.-Y.; Zhao, H.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | | | |