公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2004 | 81MS/s JPEG2000 single-chip encoder with rate-distortion optimization | Fang, Hung-Chi; Huang, Chao-Tsung; Chang, Yu-Wei; Wang, Tu-Chih; Tseng, Po-Chih; Lian, Chung-Jr; Chen, Liang-Gee | 2004 IEEE International Solid-State Circuits Conference, 2004 | 0 | 0 | |
2005 | Advances in Hardware Architectures for Image and Video Coding—A Survey | Tseng, Po-Chih; Chang, Yung-Chi; Huang, Yu-Wen; Fang, Hung-Chi; Huang, Chao-Tsung; Chen, Liang-Gee | Proceedings of IEEE | | | |
2005 | Analysis and VLSI architecture for 1-D and 2-D discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | 72 | 55 | |
2004 | B-spline factorization-based architecture for inverse discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee | International Symposium on Circuits and Systems, 2004. ISCAS '04 | | | |
2002 | Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, ISCAS 2002 | 0 | 0 | |
2002 | Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS | 12 | 0 | |
2004 | Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | 198 | 137 | |
2002 | Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method | Tseng, Po-Chih; Huang, Chao-Tsung; LIANG-GEE CHEN | IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS | 44 | 0 | |
2005 | Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 81 | 61 | |
2003 | Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9,7) filter bank | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | International Conference on Image Processing, 2003 | 0 | 0 | |
2006 | High-Performance JPEG 2000 Encoder With Rate-Distortion Optimization | Fang, Hung-Chi; Chang, Yu-Wei; Wang, Tu-Chih; Huang, Chao-Tsung; Chen, Liang-Gee | IEEE Transactions on Multimedia | | | |
2006 | Level C+ Data Reuse Scheme for Motion Estimation With Corresponding Coding Orders | Chen, Ching-Yeh; Huang, Chao-Tsung; Chen, Yi-Hau; Chen, Liang-Gee | IEEE Transactions on Circuits and Systems for | | | |
2006 | Line Buffer Wordlength Analysis for Line-Based 2-D DWT. | Cheng, Chih-Chi; Huang, Chao-Tsung; Chang, Jing-Ying; LIANG-GEE CHEN | 2006 IEEE International Conference on Acoustics Speech and Signal Processing, ICASSP 2006, Toulouse, France, May 14-19, 2006 | | | |
2004 | Memory analysis and architecture for two-dimensional discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE International Conference on Acoustics, Speech, and Signal Processing, 2004 | 0 | 0 | |
2007 | On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform | Cheng, Chih-Chi; Huang, Chao-Tsung; Chen, Ching-Yeh; Lian, Chung-Jr; Chen, Liang-Gee | IEEE Transactions on Circuits and Systems for | | | |
2007 | On-chip memory optimization scheme for VLSI implementation of line-based two-dimentional discrete wavelet transform | Cheng, Chih-Chi; Huang, Chao-Tsung; Chen, Ching-Yeh; Lian, Chung-Jr; LIANG-GEE CHEN | Ieee Transactions on Circuits and Systems for Video Technology | | 18 | |
2003 | Reconfigurable discrete wavelet transform architecture for advanced multimedia systems | Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, SIPS 2003. | | | |
2005 | Reconfigurable discrete wavelet transform processor for heterogeneous reconfigurable multimedia systems | Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee | The Journal of | | | |
2005 | Single reference frame multiple current macroblocks scheme for multi-frame motion estimation in H.264/AVC | Chen, Tung-Chien; Huang, Yu-Wen; Tsai, Chuan-Yung; Huang, Chao-Tsung; LIANG-GEE CHEN | Proceedings - IEEE International Symposium on Circuits and Systems | 16 | 0 | |
2003 | VLSI architecture for discrete wavelet transform based on B-spline factorization | Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, SIPS 2003 | | | |