公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
---|---|---|---|---|---|---|
2005 | 0.7 V Manchester carry look-ahead circuit using PD SOI CMOS asymmetrical dynamic threshold pass transistor techniques suitable for low-voltage CMOS VLSI systems | T. Y. Chiang; JAMES-B KUO | IEE Proceddings on Circuits, Devices and Systems | 2 | 2 | |
2001 | Novel 0.8V True-Single-Phase-Clocking (TSPC) Latches Using PD-SOI DTMOS Techniques for Low-Voltage CMOS VLSI Circuits | J. B. Kuo; T. Y. Chiang; JAMES-B KUO | IEEE SOI Conference Proceedings | 0 | 0 |