公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
---|---|---|---|---|---|---|
2017 | A 0.06mm2 ±50mV Range -82dB THD Chopper VCO-based Sensor Readout Circuit in 40nm CMOS | C.-C. Tu; Y.-K. Wang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE Symposium on VLSI Circuits | 16 | 0 | |
2018 | A 0.5-V 400-MHz Transceiver Using Injection-Locked Techniques in 180-nm CMOS | C.-R. Lee; T.-W. Wang; Y.-L. Tsai; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE ICSICT | 0 | 0 | |
2016 | A 0.5-V Sub-mW Energy-Efficient Receiver in 0.18-um CMOS for IoT Applications | T.-W. Wang; Y.-L. Tsai; C.-R. Lee; F.-L. Hung; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE ISOCC | 0 | 0 | |
2017 | A 0.6-V 200-kbps 429-MHz Ultra-low-power FSK Transceiver in 90-nm CMOS | C.-Y. Chiu; Z.-C. Zhang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE A-SSCC | 1 | 0 | |
2017 | A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator with a Feedback-Assisted Quantizer | C.-H. Weng; Y.-Y. Lin; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE Transactions on Circuits and Systems I | 8 | 8 | |
2010 | 1.4μW/channel 16-channel EEG/ECoG Processor for Smart Brain Sensor SoC | T.-C. Chen; T.-H. Lee; Y.-H. Chen; T.-C. Ma; T.-D. Chuang; C.-J. Chou; C.-H. Yang; T.-H. Lin; L.-G. Chen; LIANG-GEE CHEN ; TSUNG-HSIEN LIN | IEEE Symposium on VLSI Circuits | 14 | 0 | |
2017 | A 1.5-GHz Sub-Sampling Fractional-N PLL for Spread-Spectrum Clock Generator in 0.18-μm CMOS | C.-Y. Lin; T.-J. Wang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE A-SSCC | 2 | 0 | |
2015 | A 127 fJ/Conv. Continuous-Time Delta-Sigma Modulator with a DWA-Embedded Two-Step Time-Domain Quantizer | C.-H. Weng; T.-A. Wei; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE VLSI-DAT | 0 | 0 | |
2015 | A 13-MHz 68-dB SNDR CTDSM Using SAB Loop Filter and Interpolating Flash Quantizer with Random-Skip IDWA Function in 90-nm CMOS | C.-H. Weng; W.-H. Huang; E. Alpman; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE A-SSCC | 2 | 0 | |
2016 | A 13.56-MHz Passive NFC Tag IC in 0.18-μm CMOS Process for Biomedical Applications | C.-H. Lu; J.-A. Li; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE VLSI-DAT | 8 | 0 | |
2014 | 2.4-GHz Discrete-time Receiver without Subsampling Mixer | F.-C. Huang; M.-Y. Hsu; T.-H. Lin; C.-K. Wang; TSUNG-HSIEN LIN ; 林宗賢 | IET Electronics Letters | 2 | 2 | |
2016 | A 330-uW 400-MHz BPSK Transmitter in 0.18-um CMOS for Bio-medical Applications | Y.-L. Tsai; C.-Y. Lin; B.-C. Wang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE TCAS-II | |||
2016 | A 4-GHz Delta-Sigma Fractional-N Frequency Synthesizer with 2-Dimensional Quantization Noise Pushing and Fractional Spur Elimination Techniques | C.-Y. Lin; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE A-SSCC | |||
2016 | A 40-nV/√Hz 0.0145-mm2 Sensor Readout Circuit with Chopped VCO-based CTDSM in 40-nm CMOS | C.-C. Tu; Y.-K. Wang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE A-SSCC | 1 | 0 | |
2014 | A 400MHz 10Mbps D-BPSK Receiver with a Reference-less Dynamic Phase-to-Amplitude Demodulation Technique | Y.-L. Tsai; J.-Y. Chen; B.-C. Wang; T.-Y. Yeh; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE Symposium on VLSI Circuits | 9 | 0 | |
2014 | An 8.5MHz 67.2dB SNDR CTDSM with ELD Compensation Embedded Twin-T SAB and Circular TDC-based Quantizer in 90nm CMOS | C.-H. Weng; T.-A. Wei; E. Alpman; C.-T. Fu; Y.-T. Tseng; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE Symposium on VLSI Circuits | 16 | 0 | |
2006 | A 0.8-V 0.25-mW Current-Mirror OTA with 160-MHz GBW in 0.18-μm CMOS | C.-K. Wu; M.-C. Tsai; T.-H. Lin; TSUNG-HSIEN LIN | VLSI Design/CAD Symposium | 37 | 21 | |
2010 | A 1-V Low-Noise Readout Front-End for Biomedical Applications in 0.18-μm CMOS | C.-J. Chou; B.-J. Kuo; T.-H. Lin; TSUNG-HSIEN LIN | IEEE VLSI-DAT | 7 | 0 | |
2010 | A 100 Mbps, 14.3 pJ/bit Ultra-Wideband Transmitter with Pulse-Shaping FIR Filter | W.-N. Liu; T.-H. Lin; TSUNG-HSIEN LIN | VLSI Design/CAD Symposium | |||
2008 | A 120-MHz Active-RC Filter with an Agile Frequency Tuning Scheme in 0.18-μm CMOS | Y.-C. Chen; W.-H. Chiu; T.-H. Lin; TSUNG-HSIEN LIN | IEEE VLSI-DAT | 7 | 0 |